Development of the FUMILI minimization package

被引：0
|
作者：
Sitnik, I.M. [1 ]
机构：
[1] Joint Institute for Nuclear Research, Russia
来源：
Computer Physics Communications | 2014年 / 185卷 / 10期
关键词：
Conjugate gradient method;
D O I：
10.1016/j.cpc.2014.05.015
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [21] ASTRA -: a program package for accurate structure analysis by the intermeasurement minimization method
    Dudka, Alexander
    JOURNAL OF APPLIED CRYSTALLOGRAPHY, 2007, 40 : 602 - 608
  • [22] Minimization of warpage for wafer level package using response surface method
    Lee, Hye-Jin
    Park, Sun-Myoung
    Park, Sung-Jun
    INTERNATIONAL JOURNAL OF PRECISION ENGINEERING AND MANUFACTURING, 2016, 17 (09) : 1201 - 1207
  • [23] Methods of underfill flow voids detection and minimization in flip chip package
    Wang, JL
    Hsu, M
    Dunaway, P
    He, DM
    Buckmann, K
    55TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2005 PROCEEDINGS, 2005, : 190 - 195
  • [24] A global router for system-on-package targeting layer and crosstalk minimization
    Minz, JR
    Lim, SK
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2004, : 99 - 102
  • [25] Minimization of warpage for wafer level package using response surface method
    Hye-Jin Lee
    Sun-Myoung Park
    Sung-Jun Park
    International Journal of Precision Engineering and Manufacturing, 2016, 17 : 1201 - 1207
  • [26] Optimal Stochastic Package Delivery Planning with Deadline: A Cardinality Minimization in Routing
    Sawadsitang, Suttinee
    Jiang, Siwei
    Niyato, Dusit
    Wang, Ping
    2017 IEEE 86TH VEHICULAR TECHNOLOGY CONFERENCE (VTC-FALL), 2017,
  • [27] Development of Package-on-Package Using Embedded Wafer-Level Package Approach
    Chong, Ser Choong
    Wee, David Ho Soon
    Rao, Vempati Srinivasa
    Vasarla, Nagendra Sekhar
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2013, 3 (10): : 1654 - 1662
  • [28] Package characterization and development of a flip chip QFN package: fcMLF
    McCann, DR
    Ha, SH
    52ND ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2002 PROCEEDINGS, 2002, : 365 - 371
  • [29] Thin Profile Flip Chip Package-on-Package Development
    Hsieh, Ming-Che
    Kang, KeonTaek
    Choi, HangChul
    Kim, YoungCheol
    2016 11TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT-IAAC 2016), 2016, : 143 - 147
  • [30] Development of thin flip-chip BGA for package on package
    Suzuki, Yasuhiro
    Kayashima, Yuuji
    Maeda, Takehik
    Matsuura, Yoshihiro
    Sekiguchi, Tomobisa
    Watanabe, Akio
    57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS, 2007, : 8 - +
12345