共 50 条
- [1] A Behavioral Synthesis Method for Asynchronous Circuits with Bundled-data Implementation 2008 8TH INTERNATIONAL CONFERENCE ON APPLICATION OF CONCURRENCY TO SYSTEM DESIGN, PROCEEDINGS, 2008, : 50 - +
- [2] Integration of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-Data Implementation IEICE TRANSACTIONS ON ELECTRONICS, 2012, E95C (04): : 506 - 515
- [3] A control circuit synthesis method for asynchronous circuits in bundled-data implementation 2007 CIT: 7TH IEEE INTERNATIONAL CONFERENCE ON COMPUTER AND INFORMATION TECHNOLOGY, PROCEEDINGS, 2007, : 847 - +
- [4] A Floorplan Method for Asynchronous Circuits with Bundled-data Implementation on FPGAs 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 925 - 928
- [5] A Tool Set for the Design of Asynchronous Circuits with Bundled-data Implementation 2011 IEEE 29TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2011, : 78 - 83
- [6] A Floorplan Method for ASIC Designs of Asynchronous Circuits with Bundled-data Implementation 2013 IEEE 11TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2013,
- [7] Static Timing Analysis of Asynchronous Bundled-Data Circuits 2018 24TH IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS (ASYNC), 2018, : 110 - 118