A behavioral synthesis system for asynchronous circuits with bundled-data implementation

被引：0
|
作者：
Hamada, Naohiro [1 ]
Shiga, Yuki [1 ]
Konishi, Takao [1 ]
Saito, Hiroshi [1 ]
Yoneda, Tomohiro [2 ]
Myers, Chris [3 ]
Nanya, Takashi [4 ]
机构：
[1] University of Aizu, Japan
[2] National Institute of Informatics, Japan
[3] University of Utah, United States
[4] University of Tokyo, Japan
来源：
IPSJ Transactions on System LSI Design Methodology | 2009年 / 2卷
关键词：
Asynchronous sequential logic - C (programming language) - Computer simulation languages;
D O I：
10.2197/ipsjtsldm.2.64
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：64 / 79
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