共 50 条
- [42] Design and Performance Analysis for the Reversible Realization of Adder/Subtractor Circuit 2017 INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN COMPUTING AND COMMUNICATION TECHNOLOGIES (ICETCCT), 2017, : 162 - 167
- [43] An Efficient Approach for Reversible Realization of 1:4 Demultiplexer Circuit 2016 INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN ELECTRICAL ELECTRONICS & SUSTAINABLE ENERGY SYSTEMS (ICETEESES), 2016, : 229 - 233
- [44] Approximate Ternary Quantum Error Correcting Code with Low Circuit Cost 2020 IEEE 50TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL 2020), 2020, : 34 - 39
- [45] A New Gate for Low Cost Design of All-optical Reversible Logic Circuit 2015 INTERNATIONAL CONFERENCED ON CIRCUITS, POWER AND COMPUTING TECHNOLOGIES (ICCPCT-2015), 2015,
- [47] Reducing Reversible Circuit Cost by Adding Lines 40TH IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC ISMVL 2010, 2010, : 217 - 222
- [48] REALIZATION OF MAGNETIC FIELD REVERSIBLE QUANTUM HALL ARRAYS 2010 CONFERENCE ON PRECISION ELECTROMAGNETIC MEASUREMENTS CPEM, 2010, : 631 - 632
- [49] Design of Low Cost Latches Based on Reversible Quantum Dot Cellular Automata 2016 SIXTH INTERNATIONAL SYMPOSIUM ON EMBEDDED COMPUTING AND SYSTEM DESIGN (ISED 2016), 2016, : 181 - 186
- [50] A low quantum cost implementation of reversible binary-coded-decimal adder Periodica polytechnica Electrical engineering and computer science, 2020, 64 (04): : 343 - 351