Efficient VLSI implementation of modular neural network based hybrid median filter

被引:0
|
作者
Nanduri, Sambamurthy [1 ,2 ]
Kamaraju, M. [2 ]
机构
[1] JNTUK, Kakinada, India
[2] Department of Electronics and Communication Engineering, Seshadri Rao Gudlavalleru Engineering College, Andhra Pradesh, Gudlavalleru,521356, India
来源
关键词
Engineering Village;
D O I
暂无
中图分类号
学科分类号
摘要
De-noising - Hybrid median filters - Impulse classifier - Mean filter - Median-Filter - Modular neural networks - Network-based - Noise density - Proposed architectures - VLSI implementation
引用
下载
收藏
相关论文
共 50 条
  • [41] An analog VLSI pulsed neural network implementation for image segmentation
    Matolin, D
    Schreiter, J
    Getzlaff, S
    Schüffny, R
    INTERNATIONAL CONFERENCE ON PARALLEL COMPUTING IN ELECTRICAL ENGINEERING, 2004, : 51 - 55
  • [42] FPGA BASED IMPLEMENTATION OF A FUZZY NEURAL NETWORK MODULAR ARCHITECTURE FOR EMBEDDED SYSTEMS
    Prado, R. N. A.
    Melo, J. D.
    Oliveira, J. A. N.
    Doria Neto, A. D.
    2012 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS (IJCNN), 2012,
  • [43] VLSI implementation of a programmable current-mode neural network
    Ota, Yasuhiro
    Wilamowski, Bogdan M.
    Artificial Neural Networks in Engineering - Proceedings (ANNIE'94), 1994, 4 : 71 - 76
  • [44] A modified asynchronous chaotic neural network model for VLSI implementation
    Hanagata, M
    Horio, Y
    ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 657 - 660
  • [45] A kind of hybrid filter based on the median filter and the peak-and-valley filter
    Wang, CX
    Liu, Y
    Zhang, XG
    ISTM/2003: 5TH INTERNATIONAL SYMPOSIUM ON TEST AND MEASUREMENT, VOLS 1-6, CONFERENCE PROCEEDINGS, 2003, : 1768 - 1770
  • [46] Efficient Parallel Median Filter for Image Denoising: Implementation and Performance Evaluation
    Kantharimuthu, Mahendrakan
    Selvaraj, Prema
    Sankar, Harish
    Brindavanam, Gokulavasan
    Traitement du Signal, 2024, 41 (05) : 2403 - 2414
  • [47] A computationally efficient implementation of the L-1 vector median filter
    Barni, M
    Cappellini, V
    DSP 97: 1997 13TH INTERNATIONAL CONFERENCE ON DIGITAL SIGNAL PROCESSING PROCEEDINGS, VOLS 1 AND 2: SPECIAL SESSIONS, 1997, : 283 - 286
  • [48] Efficient implementation of the THSOM neural network
    Marek, Rudolf
    Skrbek, Miroslav
    ARTIFICIAL NEURAL NETWORKS - ICANN 2008, PT II, 2008, 5164 : 159 - 168
  • [49] Efficient Implementation of Neural Network Deinterlacing
    Seo, Guiwon
    Choi, Hyunsoo
    Lee, Chulhee
    IMAGE PROCESSING: ALGORITHMS AND SYSTEMS VII, 2009, 7245
  • [50] Efficient VLSI implementation of a 3-layer threshold network
    Kim, JH
    Park, SK
    Han, YN
    Oh, H
    Han, MS
    1997 IEEE INTERNATIONAL CONFERENCE ON NEURAL NETWORKS, VOLS 1-4, 1997, : 888 - 893