共 50 条
- [1] Network-on-Chip Design for Heterogeneous Multiprocessor System-on-Chip [J]. 2014 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2014, : 487 - 492
- [3] Traffic-Aware Application Mapping for Network-on-Chip based Multiprocessor System-on-Chip [J]. 2015 IEEE 17TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, 2015 IEEE 7TH INTERNATIONAL SYMPOSIUM ON CYBERSPACE SAFETY AND SECURITY, AND 2015 IEEE 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (ICESS), 2015, : 571 - 576
- [6] Network-on-chip modeling for system-level multiprocessor simulation [J]. RTSS 2003: 24TH IEEE INTERNATIONAL REAL-TIME SYSTEMS SYMPOSIUM, PROCEEDINGS, 2003, : 265 - 274
- [7] DIMES: An iterative emulation platform for multiprocessor-system-on-chip designs [J]. 2003 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), PROCEEDINGS, 2003, : 244 - 251
- [8] Parallel LDPC Decoding on a Network-on-Chip Based Multiprocessor Platform [J]. PROCEEDINGS OF THE 21ST INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING, 2009, : 35 - +
- [9] Online Resource Management in a Multiprocessor with a Network-on-Chip [J]. APPLIED COMPUTING 2007, VOL 1 AND 2, 2007, : 1557 - +
- [10] A Low-Power Fat Tree-based Optical Network-on-Chip for Multiprocessor System-on-Chip [J]. DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3, 2009, : 3 - +