Temperature dependence analysis of on-state resistance of a high-voltage LDMOS at very high temperatures

被引：0

作者：

Ke, Dao-Ming ^{[1
]}

Chen, Jun-Ning ^{[1
]}

机构：

[1] Electron. Eng. Dept. of Anhui Univ., Hefei 230061, China

来源：

Tien Tzu Hsueh Pao/Acta Electronica Sinica | 2002年 / 30卷 / 08期

关键词：

Calculations - Electric resistance - Equivalent circuits - Temperature;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

The paper gives the equivalent circuit of a high voltage LDMOS at very high temperatures, and analyzes performance of leakage current and intrinsic parameters of a LDMOS from 25°C to 300 °C. It may be concluded that the maximal applied temperature of a LDMOS is determined by the reverse leakage current of a pn junction across gate and drain, and the relationship between on resistance and temperature is (T/T1)y(y is 1.5 to 2.5).

引用

页码：1111 / 1113

共 50 条

[41] HIGH-VOLTAGE MULTIPLE-RESISTIVITY DRIFT-REGION LDMOS
MENA, JG
SALAMA, CAT
[J]. ENERGY, 1995, 20 (07) : U6 - U7
[42] STACKING OF HIGH-VOLTAGE RESISTANCE DIVIDERS
RUNGIS, J
BROWN, DE
[J]. IEE PROCEEDINGS-A-SCIENCE MEASUREMENT AND TECHNOLOGY, 1982, 129 (02): : 119 - 120
[43] HIGH-VOLTAGE MULTIPLE-RESISTIVITY DRIFT-REGION LDMOS
MENA, JG
SALAMA, CAT
[J]. SOLID-STATE ELECTRONICS, 1986, 29 (06) : 647 - 656
[44] HIGH-VOLTAGE MULTIPLE-RESISTIVITY DRIFT-REGION LDMOS
MENA, JG
SALAMA, CAT
[J]. ENERGY, 1995, 20 (10) : U6 - U7
[45] A Novel Compact High-Voltage LDMOS Transistor Model for Circuit Simulation
Shi, Longxing
Jia, Kan
Sun, Weifeng
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (01) : 346 - 353
[46] Universal trench design method for a high-voltage SOI trench LDMOS
胡夏融
张波
罗小蓉
李肇基
[J]. Journal of Semiconductors, 2012, 33 (07) : 47 - 50
[47] HIGH-VOLTAGE MULTIPLE-RESISTIVITY DRIFT-REGION LDMOS
MENA, JG
SALAMA, CAT
[J]. ENERGY, 1987, 12 (3-4) : UR7 - UR8
[48] High-Voltage SOI SJ-LDMOS With a Nondepletion Compensation Layer
Wang, Wenlian
Zhang, Bo
Li, Zhaoji
Chen, Wanjun
[J]. IEEE ELECTRON DEVICE LETTERS, 2009, 30 (01) : 68 - 71
[49] Universal trench design method for a high-voltage SOI trench LDMOS
Hu Xiarong
Zhang Bo
Luo Xiaorong
Li Zhaoji
[J]. JOURNAL OF SEMICONDUCTORS, 2012, 33 (07)
[50] Novel High-voltage LDMOS with Linear Graded Drift Region Width
Yao, Jiafei
Guo, Yufeng
Zhang, Jun
Lin, Hong
Xia, Xiaojuan
Wang, Zixuan
[J]. PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2015, : 609 - 612

← 1 2 3 4 5 →