High-Voltage SOI SJ-LDMOS With a Nondepletion Compensation Layer

被引：18
|
作者：
Wang, Wenlian [1 ,2 ]
Zhang, Bo [1 ]
Li, Zhaoji [1 ]
Chen, Wanjun [1 ]
机构：
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China
[2] N Univ China, Minist Educ, Key Lab Instrumentat Sci & Dynam Measurement, Taiyuan 030051, Peoples R China
来源：
IEEE ELECTRON DEVICE LETTERS | 2009年 / 30卷 / 01期
基金：
中国国家自然科学基金;
关键词：
LDMOS; nondepletion compensation; substrate-assisted depletion effect; superjunction (SJ);
D O I：
10.1109/LED.2008.2008208
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new superjunction LDMOS on silicon-on-insulator (SOI) with a nondepletion compensation layer (NDCL) is proposed. The NDCL can be self-adaptive to provide additional charges for compensating the charge imbalance while eliminating the substrate-assisted depletion effect. In addition, the high-density oxide interface charges at the top surface of the buried oxide layer (BOX) enhance the electric field in the BOX and improve the vertical breakdown voltage (BV). Numerical simulation results indicate that a uniform surface electric field profile is obtained and that the vertical electric field in BOX is increased to 6 x 10(6) V/cm, which results in a high BV of 300 V for the proposed device with the BOX thickness of 0.5 mu m and drift length of 15 Mm on a thin SOI substrate.
引用
收藏
页码：68 / 71
页数：4
相关论文
共 50 条
  • [1] High Voltage SOI SJ-LDMOS on Composite Substrate
    Wang, Wenlian
    Zhang, Bo
    Li, Zhaoji
    [J]. 2009 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLUMES I & II: COMMUNICATIONS, NETWORKS AND SIGNAL PROCESSING, VOL I/ELECTRONIC DEVICES, CIRUITS AND SYSTEMS, VOL II, 2009, : 614 - 616
  • [2] High voltage SOI SJ-LDMOS with dynamic buffer
    Wang, W. L.
    Zhang, B.
    Chen, W. J.
    Li, Z. J.
    [J]. ELECTRONICS LETTERS, 2009, 45 (09) : 478 - 479
  • [3] High voltage SOI SJ-LDMOS with dynamic back-gate voltage
    Wang, W. L.
    Zhang, B.
    Chen, W. J.
    Li, Z. J.
    [J]. ELECTRONICS LETTERS, 2009, 45 (04) : 233 - 234
  • [4] Novel SJ-LDMOS on SOI with step doping surface-implanted layer
    Chen, Wanjun
    Zhang, Bo
    Li, Zhaoji
    [J]. 2007 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEMS; VOL 2: SIGNAL PROCESSING, COMPUTATIONAL INTELLIGENCE, CIRCUITS AND SYSTEMS, 2007, : 1256 - +
  • [5] Realizing high voltage SJ-LDMOS with non-uniform N-buried layer
    Chen, Wanjun
    Zhang, Bo
    Li, Zhaoji
    [J]. SOLID-STATE ELECTRONICS, 2008, 52 (05) : 675 - 678
  • [6] New high voltage SJ-LDMOS with non-uniform N-buried layer
    Chen, Wanjun
    Zhang, Bo
    Li, Zhaoji
    [J]. 2007 INTERNATIONAL WORKSHOP ON ELECTRON DEVICES AND SEMICONDUCTOR TECHNOLOGY, 2007, : 70 - +
  • [7] High Voltage SJ-LDMOS with Charge-Balanced Pillar and N- Buffer Layer
    Wu, Wei
    Zhang, Bo
    Fang, Jian
    Li, ZhaoJi
    [J]. 2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012), 2012, : 287 - 289
  • [8] A High-Voltage LDMOS Compatible With High-Voltage Integrated Circuits on p-Type SOI Layer
    Luo, Xiaorong
    Lei, Tianfei
    Wang, Yuangang
    Gao, Huanmei
    Fang, Jian
    Qiao, Ming
    Zhang, Wei
    Deng, Hao
    Zhang, Bo
    Li, Zhaoji
    Xiao, Zhiqiang
    Chen, Zhengcai
    Xu, Jing
    [J]. IEEE ELECTRON DEVICE LETTERS, 2009, 30 (10) : 1093 - 1095
  • [9] SJ-LDMOS with high breakdown voltage and ultra-low on-resistance
    Chen, W.
    Zhang, B.
    Li, Z.
    [J]. ELECTRONICS LETTERS, 2006, 42 (22) : 1314 - 1316
  • [10] A high-voltage SOI MOSFET with a compensation layer on the trenched buried oxide layer
    赵秋明
    李琦
    唐宁
    李勇昌
    [J]. Journal of Semiconductors, 2013, 34 (03) : 31 - 34
12345