Universal trench design method for a high-voltage SOI trench LDMOS

被引：0
|
作者：
胡夏融 [1 ]
张波 [1 ]
罗小蓉 [1 ]
李肇基 [1 ]
机构：
[1] State Key Laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China
来源：
Journal of Semiconductors | 2012年 / 33卷 / 07期
基金：
中国国家自然科学基金;
关键词：
SOI; trench; permittivity; RESURF; LDMOS; breakdown voltage;
D O I：
暂无
中图分类号：
TN386 [场效应器件];
学科分类号：
0805 ; 080501 ; 080502 ; 080903 ;
摘要：
The design method for a high-voltage SOI trench LDMOS for various trench permittivities,widths and depths is introduced.A universal method for efficient design is presented for the first time,taking the trade-off between breakdown voltage（BV） and specific on-resistance(R;) into account.The high-/:（relative permittivity） dielectric is suitable to fill a shallow and wide trench while the low-k dielectric is suitable to fill a deep and narrow trench.An SOI LDMOS with a vacuum trench in the drift region is also discussed.Simulation results show that the high FOM BV;/R;can be achieved with a trench filled with the low-k dielectric due to its shortened cell-pitch.
引用
收藏
页码：47 / 50
页数：4
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