New approach to test generation for combinational circuits

被引:0
|
作者
Zhao, Chun-Hui [1 ]
Hou, Yan-Li [1 ]
Hu, Jia-Wei [1 ]
Lan, Hai-Yan [1 ]
机构
[1] School of Information and Communication Engineering, Harbin Engineering University, Harbin 150001, China
关键词
Compendex;
D O I
暂无
中图分类号
学科分类号
摘要
Particle swarm optimization (PSO)
引用
收藏
页码:61 / 65
相关论文
共 50 条
  • [21] Complete critical path algorithm for test generation of combinational circuits
    Zhou, Quan
    Wei, Daozheng
    Journal of Computer Science and Technology, 1991, 6 (01) : 74 - 82
  • [22] Test generation for primitive path delay faults in combinational circuits
    Tekumalla, RC
    Menon, PR
    1997 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS, 1997, : 636 - 641
  • [23] Parallel test generation for combinational circuits based on Boolean satisfiability
    Sun, YZ
    Wei, DZ
    NINTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE AND EXHIBIT, PROCEEDINGS, 1996, : 267 - 270
  • [24] Combinational automatic test pattern generation for acyclic sequential circuits
    Kim, YC
    Agrawal, VD
    Saluja, KK
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2005, 24 (06) : 948 - 956
  • [25] Research on application of OBDD to test generation of combinational logic circuits
    VLSI Research Institute, Shanghai Jiaotong University, Shanghai 200030, China
    Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design and Computer Graphics, 2001, 13 (06): : 495 - 499
  • [26] Hierarchical test generation for combinational circuits with real defects coverage
    Cibáková, T
    Fischerová, M
    Gramatová, E
    Kuzmicz, W
    Pleskauz, WA
    Raik, J
    Ubar, R
    MICROELECTRONICS RELIABILITY, 2002, 42 (07) : 1141 - 1149
  • [27] Test generation for combinational quantum cellular automata (QCA) circuits
    Gupta, Pallav
    Jha, Niraj K.
    Lingappan, Loganathan
    2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS, 2006, : 309 - +
  • [28] INTELLIGENT BACKTRACKING IN TEST-GENERATION FOR COMBINATIONAL-CIRCUITS
    ZENG, WB
    WEI, DZ
    PROCEEDINGS - IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN : VLSI IN COMPUTERS & PROCESSORS, 1989, : 48 - 51
  • [29] Combinational Test Generation for Transition Faults in Acyclic Sequential Circuits
    Shi Hui
    Ran Feng
    Zhang Jinyi
    2008 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING, VOLS 1 AND 2, 2008, : 398 - 402
  • [30] A Complete Critical Path Algorithm for Test Generation of Combinational Circuits
    周权
    魏道政
    JournalofComputerScienceandTechnology, 1991, (01) : 74 - 82