A fabrication process and packaging for high reliability fingerprint sensor LSI

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作者
Machida, K.
Shigematsu, S.
Morimura, H.
Tanabe, Y.
Unno, H.
Sakuma, K.
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| 2001年 / Nippon Telegraph and Telephone Corp.卷 / 50期
关键词
CMOS integrated circuits - Electronics packaging - Electrostatics - LSI circuits - Reliability - Semiconductor device manufacture - Sensors - Stresses;
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摘要
We describe a new semiconductor capacitive sensor structure, the fabrication process and packaging for a fingerprint sensor LSI in which the sensor is stacked on 0.5-μ m CMOS LSI. To ascertain the influence of the fabrication process and usage on underlying LSI, sensor chips were subjected to reliability tests of electrostatic discharge (ESD), mechanical stress, and water penetration. The feature of sensor structure is that each sensor pixel has a grounded wall (GND wall) for ESD tolerance. The reliability tests confirm that the proposed sensor and packaging technology have sufficient reliability for conventional identification usage.
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