Facing the challenge of adding RF and mixed-signal IP to SoCs

被引：0
|
作者：
Singh, Raminderpal [1 ]
机构：
[1] IBM's Analog Mixed-Signal Foundry, Essex Junction, VT, United States
来源：
Electronic Design | 2002年 / 50卷 / 24期
关键词：
Analog blocks - CAD designs - Design flows - Design-process - Inductance capacitance - Mixed signal - Parasitics - Process design kit - RF signal - System-on-a-chip designs;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
(Edited Abstract)
引用
收藏
页码：63 / 66
相关论文
共 50 条
  • [21] Research on test structure of analog cores in mixed-signal SoCs
    Jin, Yang
    Wang, Hong
    Yang, Shiyuan
    Lu, Zhengliang
    Zheng, Yan
    Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design and Computer Graphics, 2010, 22 (11): : 2004 - 2012
  • [22] Power Conversion Schemes in Nanometer CMOS Mixed-Signal SoCs
    Fu, Wei
    Fayed, Ayman
    2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2014, : 606 - 609
  • [23] Speeding Up Analog Integration and Test for Mixed-Signal SoCs
    Ivanov, Andre
    IEEE DESIGN & TEST, 2015, 32 (01) : 4 - 5
  • [24] Analog / Mixed-Signal / RF Circuits for Complex Signal Processing
    Kobayashi, Haruo
    Kushita, Nene
    Tran, Minh Tri
    Asami, Koji
    San, Hao
    Kuwana, Anna
    Hatta, Akemi
    2019 IEEE 13TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2019,
  • [25] MIXED-SIGNAL DEVICES PRESENT TESTING CHALLENGE
    NOVELLINO, J
    ELECTRONIC DESIGN, 1990, 38 (13) : 53 - &
  • [26] Analog/mixed-signal IP modeling for design reuse
    Madrid, NM
    Peralías, E
    Acosta, A
    Rueda, A
    DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS, 2001, : 766 - 767
  • [27] Distributed collaborative design of a mixed-signal IP component
    Pawlak, Adam
    Penkala, Piotr
    Fras, Pawel
    Sakowski, Wojciech
    Grau, Guenter
    Grzybek, Szymon
    Stanitzki, Alexander
    PROCEEDINGS OF THE 2009 12TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, ARCHITECTURES, METHODS AND TOOLS, 2009, : 50 - +
  • [28] Design for manufacturability characterization and optimization of mixed-signal IP
    McNamara, P
    Saxena, S
    Guardiani, C
    Taguchi, H
    Yoshida, E
    Takahashi, N
    Miyamoto, K
    Sugawara, K
    Matsunaga, T
    PROCEEDINGS OF THE IEEE 2001 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2001, : 271 - 274
  • [29] Analog IP lags digital in mixed-signal arena
    Small, CH
    COMPUTER DESIGN, 1997, 36 (09): : 39 - +
  • [30] A study on analog IP blocks for mixed-signal SoC
    Li, ZY
    Li, L
    Yuan, JR
    2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2003, : 564 - 567
12345