The current status and perspective in testing 3D stacked ICs

被引：0
|
作者：
机构：
来源：
Journal of Japan Institute of Electronics Packaging | 2020年 / 23卷 / 01期
关键词：
18;
D O I：
10.5104/jiep.23.32
中图分类号：
学科分类号：
摘要：
[No abstract available]
引用
收藏
页码：32 / 36
页数：4
相关论文
共 50 条
  • [21] Pre-Bond Probing of TSVs in 3D Stacked ICs
    Noia, Brandon
    Chakrabarty, Krishnendu
    2011 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2011,
  • [22] Performance Evaluation of Hierarchical NoC Topologies for Stacked 3D ICs
    Matos, Debora
    Prass, Max
    Kreutz, Marcio
    Carro, Luigi
    Susin, Altamiro
    2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 1961 - 1964
  • [23] A Design for Testability of Open Defects at Interconnects in 3D Stacked ICs
    Ashikin, Fara
    Hashizume, Masaki
    Yotsuyanagi, Hiroyuki
    Lu, Shyue-Kung
    Roth, Zvi
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2018, E101D (08): : 2053 - 2063
  • [24] Optimization Methods for Post-Bond Die-Internal/External Testing in 3D Stacked ICs
    Noia, Brandon
    Chakrabarty, Krishnendu
    Marinissen, Erik Jan
    INTERNATIONAL TEST CONFERENCE 2010, 2010,
  • [25] Trend from ICs to 3D ICs to 3D Systems
    Tummala, Rao R.
    Sundaram, Venky
    Chatterjee, Ritwik
    Raj, P. Markondeya
    Kumbhat, Nitesh
    Sukumaran, Vijay
    Sridharan, Vivek
    Choudury, Abhishek
    Chen, Qiao
    Bandyopadhyay, Tapobrata
    PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2009, : 439 - 444
  • [26] On Effective and Efficient In-Field TSV Repair for Stacked 3D ICs
    Jiang, Li
    Ye, Fangming
    Xu, Qiang
    Chakrabarty, Krishnendu
    Eklow, Bill
    2013 50TH ACM / EDAC / IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2013,
  • [27] Algorithms for TSV resource sharing and optimization in designing 3D stacked ICs
    Lee, Byunghyun
    Kim, Taewhan
    INTEGRATION-THE VLSI JOURNAL, 2014, 47 (02) : 184 - 194
  • [28] On Maximizing the Compound Yield for 3D Wafer-to-Wafer Stacked ICs
    Taouil, Mottaqiallah
    Hamdioui, Said
    Verbree, Jouke
    Marinissen, Erik Jan
    INTERNATIONAL TEST CONFERENCE 2010, 2010,
  • [29] Reliability Aware Through Silicon Via Planning for 3D Stacked ICs
    Shayan, Amirali
    Hu, Xiang
    Peng, He
    Cheng, Chung-Kuan
    Yu, Wenjian
    Popovich, Mikhail
    Toms, Thomas
    Chen, Xiaoming
    DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3, 2009, : 288 - +
  • [30] Temperature-Gradient Based Test Scheduling for 3D Stacked ICs
    Aghaee, Nima
    Peng, Zebo
    Eles, Petru
    2013 IEEE 20TH INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS), 2013, : 405 - 408
12345