Integration and verification case of IP-core based system on chip design

被引：2

作者：

胡越黎 ^{[1
,2
]}

周谌 ^{[2
]}

机构：

[1] School of Mechanical and Electronic Engineering and Automation,Shanghai University

[2] Key Laboratory of Advanced Display and System

来源：

Journal of Shanghai University(English Edition) | 2010年 / 14卷 / 05期

关键词：

D O I：

暂无

中图分类号：

TN47 [大规模集成电路、超大规模集成电路];

学科分类号：

摘要：

In this paper, the design and verification process of an automobile-engine-fan control system on chip (SoC) are introduced. The SoC system, SHU-MV08, reuses four new intellectual property (IP) cores and the design flow is accomplished with 0.35 μm chartered CMOS technology. Some special functions of IP cores, the detailed integration scheme of four IP cores, and the verification method of the entire SoC are presented. To settle the verification problems brought by analog IP cores, NanoSim based chip-level mixed-signal verification method is introduced. The verification time is greatly reduced and the first tape-out achieves success which proves the validity of our design.

引用

页码：349 / 353

页数：5

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