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- [23] BUS AND MEMORY INTERFERENCE IN DOUBLE BUS MULTIPROCESSOR SYSTEMS MICROPROCESSING AND MICROPROGRAMMING, 1984, 13 (02): : 73 - 96
- [24] An effective bus-based arbiter for processors communication 18TH INTERNATIONAL CONFERENCE ON ADVANCED INFORMATION NETWORKING AND APPLICATIONS, VOL 2 (REGULAR PAPERS), PROCEEDINGS, 2004, : 236 - 240
- [26] An Improved High-speed Lottery Bus Arbiter Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology, 2014, 36 (08): : 2016 - 2022
- [27] MULTIPLE-BUS MULTIPROCESSOR SYSTEMS PROCEEDINGS OF THE TWENTY-FIRST, ANNUAL HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES, VOLS 1-4: ARCHITECTURE TRACK, SOFTWARE TRACK, DECISION SUPPORT AND KNOWLEDGE BASED SYSTEMS TRACK, APPLICATIONS TRACK, 1988, : 59 - 69
- [29] VME BUS PERFORMANCE IN MULTIPROCESSOR SYSTEMS PROCEEDINGS OF THE 1989 IEEE PARTICLE ACCELERATOR CONFERENCE, VOLS 1-3: ACCELERATOR SCIENCE AND TECHNOLOGY, 1989, : 1654 - 1656