OPTIMAL SCHEDULING OF SIGNATURE ANALYSIS FOR VLSI TESTING

被引：5
|
作者：
LEE, YH [1 ]
KRISHNA, CM [1 ]
机构：
[1] UNIV MASSACHUSETTS,DEPT ELECT & COMP ENGN,AMHERST,MA 01003
来源：
IEEE TRANSACTIONS ON COMPUTERS | 1991年 / 40卷 / 03期
关键词：
SELF-TESTING; SIGNATURE ANALYSIS; TEST OPTIMIZATION; VLSI TESTING;
D O I：
10.1109/12.76412
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Signature analysis has become a popular way of testing VLSI circuits. We present a simple algorithm to optimally schedule the signature analyses. The objective is to minimize the mean testing time per VLSI circuit.
引用
收藏
页码：336 / 341
页数：6
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