Impact of High-kappa Spacer on Junctionless Transistor in Sub-Threshold Regime

被引:1
|
作者
Ghosh, Bahniman [1 ,2 ]
Mondal, Partha [2 ]
Akram, M. W. [2 ]
Bal, Punyasloka [2 ]
机构
[1] Univ Texas Austin, Microelect Res Ctr, Austin, TX 78758 USA
[2] Indian Inst Technol Kanpur, Dept Elect Engn, Kanpur 208016, Uttar Pradesh, India
关键词
Junctionless Transistors (JLTs); Band-to-Band Tunneling (BTBT); High-kappa Spacers;
D O I
10.1166/jolpe.2014.1312
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We investigated the impact of high-kappa spacers on the off-state leakage current due to band-to-band tunneling (BTBT) in junctionless transistors (JLTs). In off-state, a significant band overlap between valence band of channel region and conduction band of drain region triggers the electrons to tunnel from valence band of channel region to conduction band of drain region and increases the off-state leakage current. Here we show that in off-state the vertical fringing electric field through the high-kappa spacer to the device layer increases tunneling distance along tunneling path of electron and reduces tunneling leakage currents.
引用
收藏
页码:293 / 296
页数:4
相关论文
共 50 条
  • [31] A current sensing completion detection method for asynchronous pipelines operating in the sub-threshold regime
    Akgun, Omer Can
    Guerkaynak, Frank K.
    Leblebici, Yusuf
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2009, 37 (02) : 203 - 220
  • [32] Effects of scaling on the impact ionization and sub-threshold current in submicron MOSFETs
    Jharia, Bhavana
    Sarkar, S.
    Agarwal, R. P.
    MICROELECTRONICS INTERNATIONAL, 2008, 25 (01) : 41 - 45
  • [33] A Si tunnel field-effect transistor model with a high switching current ratio and steep sub-threshold swing
    Wang, X. D.
    Xiong, Y.
    Tang, M. H.
    Peng, L.
    Xiao, Y. G.
    Xu, X. Y.
    Liang, S. E.
    Zhong, X. H.
    He, J. H.
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2014, 29 (09)
  • [34] Revisiting the Impact on Sub-Threshold Regions in Uniaxially-Strained FETs
    Na, M. H.
    Mcstay, K.
    Nowak, E. J.
    CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE 2013 (CSTIC 2013), 2013, 52 (01): : 57 - 59
  • [35] The Impact of Inverse Narrow Width Effect on Sub-threshold Device Sizing
    Zhou, Jun
    Jayapal, Senthil
    Stuyt, Jan
    Huisken, Jos
    de Groot, Harmke
    2011 16TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2011,
  • [36] Energy and impact angle dependence of sub-threshold external electron emission
    Heuser, C.
    Wucher, A.
    NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION B-BEAM INTERACTIONS WITH MATERIALS AND ATOMS, 2013, 317 : 37 - 43
  • [37] A Sub-threshold Eight Transistor (8T) SRAM Cell Design for Stability Improvement
    Kushwah, C. B.
    Vishvakarma, S. K.
    2014 IEEE INTERNATIONAL CONFERENCE ON IC DESIGN & TECHNOLOGY (ICICDT), 2014,
  • [38] Impact of High-k spacer and Negative Capacitance on Double Gate Junctionless Transistor for Improved Short Channel Immunity and Reliability
    Mehta, Hema
    Kaur, Harsupreet
    2018 4TH INTERNATIONAL CONFERENCE ON DEVICES, CIRCUITS AND SYSTEMS (ICDCS), 2018, : 164 - 168
  • [39] Impact of High-κ Spacer on Circuit Level Performance of Junctionless FinFET
    Surana, Neelam
    Mekie, Joycee
    Mohapatra, Nihar Ranjan
    2017 INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2017,
  • [40] Impact of High-Mobility Materials on the Performance of Near- and Sub-Threshold CMOS Logic Circuits
    Crupi, Felice
    Albano, Domenico
    Alioto, Massimo
    Franco, Jacopo
    Selmi, Luca
    Mitard, Jerome
    Groeseneken, Guido
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (03) : 972 - 977