GRAPHICAL ANALYSIS OF A DIGITAL PHASE-LOCKED LOOP

被引:3
|
作者
RUSSO, F [1 ]
机构
[1] UNIV PISA,DEPT ELECT ENGN,I-56100 PISA,ITALY
关键词
D O I
10.1109/TAES.1979.308799
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
引用
收藏
页码:88 / 94
页数:7
相关论文
共 50 条
  • [1] DYNAMICS OF DIGITAL PHASE-LOCKED LOOP
    MAKSAKOV, VP
    [J]. RADIOTEKHNIKA I ELEKTRONIKA, 1988, 33 (05): : 999 - 1007
  • [2] DIGITAL PHASE-LOCKED LOOP.
    Furtney Jr., R.W.
    [J]. 1884, (17):
  • [3] DIGITAL PHASE-LOCKED LOOP MODELS
    BELYKH, VN
    [J]. RADIOTEKHNIKA I ELEKTRONIKA, 1979, 24 (11): : 2244 - 2253
  • [4] BINARY QUANTIZED DIGITAL PHASE LOCKED LOOP - GRAPHICAL ANALYSIS
    DANDREA, NA
    RUSSO, F
    [J]. IEEE TRANSACTIONS ON COMMUNICATIONS, 1978, 26 (09) : 1355 - 1364
  • [5] ANALYSIS AND SYNTHESIS OF A DIGITAL PHASE-LOCKED LOOP FOR FM DEMODULATION
    PASTERNA.G
    WHALIN, RL
    [J]. BELL SYSTEM TECHNICAL JOURNAL, 1968, 47 (10): : 2207 - &
  • [6] A design method for digital phase-locked loop
    Ru Jiyuan
    Liu Yujia
    Xue Wei
    [J]. PROCEEDINGS OF THE 2015 4TH NATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS AND COMPUTER ENGINEERING ( NCEECE 2015), 2016, 47 : 1471 - 1475
  • [7] A digital phase-locked loop for frequency detection
    Werter, JM
    [J]. 38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1996, : 1252 - 1255
  • [8] JITTER REDUCTION OF A DIGITAL PHASE-LOCKED LOOP
    YAMASHITA, M
    TSUJI, T
    NISHIMURA, T
    MURATA, M
    NAMEKAWA, T
    [J]. PROCEEDINGS OF THE IEEE, 1976, 64 (11) : 1640 - 1641
  • [9] Markov model for digital phase-locked loop
    Samokhvalov, A.A.
    Kondrat'ev, A.V.
    Timofeev, A.A.
    [J]. Elektromagnitnye Volny i Elektronnye Systemy, 2005, 10 (06): : 47 - 55
  • [10] DIGITAL PHASE-LOCKED LOOP WITH JITTER BOUNDED
    WALTERS, SM
    TROUDET, T
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1989, 36 (07): : 980 - 987