A 48.1 PS HEMT DCFL NAND CIRCUIT WITH A DUAL-GATE STRUCTURE

被引:1
|
作者
SUEHIRO, H
MIYATA, T
HARA, N
KURODA, S
机构
[1] Fujitsu Laboratories Ltd, Atsugi, 243-01
关键词
HEMT; NAND; DCFL; DUAL GATE;
D O I
10.1016/0038-1101(95)00040-Z
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We fabricated HEMT DCFL 2-input NAND circuits and examined their feasibility using a dual gate structure. Our HEMT had MOVPE-grown InGaP/InGaAs/GaAs pseudomorphic HEMT structures. We first investigated characteristics of the dual gate HEMT in the short gate length region and showed that HEMTs can reveal their inherent properties even in the DCFL NAND circuits. We fabricated a 2-input NAND ring oscillator with a gate length of 0.5 mu m. It successfully operated and showed a propagation delay of 48.1 ps and a power consumption of 0.235 mW per stage at a supply voltage of 0.8 V. A master-slave type divide-by-two frequency divider which consists of eight 2-input NAND gates also showed 3.14 GHz operation with a power consumption of 2 mW.
引用
收藏
页码:1717 / 1721
页数:5
相关论文
共 50 条
  • [21] 6-in Dual-Gate Ring Commutated Thyristor for DC Circuit Breakers
    Lyu, Gang
    Yu, Zhanqing
    Zhou, Wenpeng
    Xu, Chaoqun
    Chen, Zhengyu
    Zhao, Biao
    Liu, Jiapeng
    Zeng, Rong
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (03) : 1444 - 1449
  • [22] Enhanced current mirror circuit by dual-gate coplanar amorphous InGaZnO TFTs
    Rahaman, Abidur
    Adhikary, Apurba
    Hossain, Mohammad Amzad
    Islam, Md Mobaidul
    Jang, Jin
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2022, 50 (03) : 1015 - 1020
  • [23] Closed-Form Model for Dual-Gate Ambipolar CNTFET Circuit Design
    Hu, Xuan
    Friedman, Joseph S.
    2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017,
  • [24] A HIGH-VOLTAGE DUAL-GATE DMOS STRUCTURE (DGDMOS)
    DUNN, CN
    GAMMEL, JC
    SHIBIB, MA
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1987, 134 (03) : C113 - C113
  • [26] SUBMICROMETER INSULATED-GATE INVERTED-STRUCTURE HEMT FOR HIGH-SPEED LARGE-LOGIC-SWING DCFL GATE
    KINOSHITA, H
    ISHIDA, T
    INOMATA, H
    AKIYAMA, M
    KAMINISHI, K
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1986, 33 (05) : 608 - 615
  • [27] Device and Circuit Models of InAlN/GaN D- and Dual-Gate E-Mode HEMTs for Design and Characterisation of Monolithic NAND Logic Cell
    Chvala, Ales
    Nagy, Lukas
    Marek, Juraj
    Priesol, Juraj
    Donoval, Daniel
    Satka, Alexander
    Blaho, Michal
    Gregusova, Dagmar
    Kuzmik, Jan
    2018 13TH INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA (DTIS 2018), 2018,
  • [28] TCAD analysis of gate leakage and threshold drift in GaN devices with dual-gate structure
    Xie, Hao-jie
    Wang, Ying
    Liu, Shi-Jin
    Yu, Cheng-Hao
    Guo, Hao-Min
    MICROELECTRONICS JOURNAL, 2025, 156
  • [29] AlGaN/GaN Dual-Gate HEMT Using a High Al Mole Fraction and Thin Barrier Layer
    Ando, Yuji
    Takahashi, Hidemasa
    Makisako, Ryutaro
    Wakejima, Akio
    Suda, Jun
    ELECTRONICS LETTERS, 2025, 61 (01)
  • [30] Integrated coplanar mm-wave amplifier with gain control using a dual-gate InP HEMT
    Schefer, M
    Meier, HP
    Klepser, BU
    Patrick, W
    Bachtold, W
    1996 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-3, 1996, : 521 - 524