TCAD analysis of gate leakage and threshold drift in GaN devices with dual-gate structure

This article explores the characteristics and performance of a novel high-electron-mobility-transistor (HEMTs) featuring a dual-gate and dual-field plate design. Two-dimensional numerical simulations of the devices were conducted using the semiconductor process simulation software Sentaurus TCAD. The gate reliability issue of pGaN packaged AlGaN/GaN high electron mobility transistors (HEMTs) was assessed by monitoring the positive gate bias stress time variation from 1 mu s to 10s. Compared to conventional p-GaN HEMT devices, research simulations show a reduction in gate leakage and an increase in forward gate breakdown voltage from 8.6 V to 11.4 V. Under the parametric conditions described in the text, the reduction in sub-gate resistance results in higher total saturation currents and higher power. This improvement is achieved at the expense of on-resistance and gate capacitance. The simulation results demonstrate that the improvement of the gate by leakage measurement electric field reduces the threshold drift of the device drain bias at 20 V, with the effect of the best forward drift being reduced from 0.2 V to approximately 0.1 V (stress = 10s).