共 50 条
- [42] High-Level Designs of Complex FIR Filters on FPGAs for the SKA PROCEEDINGS OF 2016 IEEE 18TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS; IEEE 14TH INTERNATIONAL CONFERENCE ON SMART CITY; IEEE 2ND INTERNATIONAL CONFERENCE ON DATA SCIENCE AND SYSTEMS (HPCC/SMARTCITY/DSS), 2016, : 797 - 804
- [43] An Automated High-level Design Framework for Partially Reconfigurable FPGAs 2015 IEEE 29TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM WORKSHOPS, 2015, : 170 - 175
- [46] High-level synthesis for FPGAs: code optimization strategies for real-time image processing Journal of Real-Time Image Processing, 2018, 14 : 701 - 712
- [47] HIGH-LEVEL SYNTHESIS AND GENERATING FPGAS WITH THE BEDROC SYSTEM (VOL 6, PG 192, 1993) JOURNAL OF VLSI SIGNAL PROCESSING, 1993, 6 (03): : 301 - 301
- [49] Implementation of sphere decoder for MIMO-OFDM on FPGAs using high-level synthesis tools Analog Integrated Circuits and Signal Processing, 2011, 69 : 119 - 129
- [50] Evaluating High-Level Design Strategies on FPGAs for High-Performance Computing 2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), 2017,