共 50 条
- [31] Neural implementation of one-step parallel thinning algorithm Lee, Jin-Ho, 1600, ASME, New York, NY, United States (04):
- [33] A Parallel Yet Pipelined Architecture for Efficient Implementation of the Advanced Encryption Standard Algorithm on Reconfigurable Hardware International Journal of Parallel Programming, 2016, 44 : 1102 - 1117
- [34] An area efficient FFT and its hardware implementation JOURNAL OF INFORMATION & OPTIMIZATION SCIENCES, 2022, 43 (03): : 505 - 511
- [36] Backlog-aware crossbar schedulers: A new algorithm and its efficient hardware implementation 16TH ANNUAL IEEE SYMPOSIUM ON HIGH-PERFORMANCE INTERCONNECTS, PROCEEDINGS, 2008, : 67 - 74
- [39] An Efficient Hardware Implementation of Canny Edge Detection Algorithm 2016 29TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2016 15TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2016, : 457 - 462
- [40] Efficient Fast Updated Frequent Pattern Tree Algorithm and Its Parallel Implementation 2017 2ND INTERNATIONAL CONFERENCE ON IMAGE, VISION AND COMPUTING (ICIVC 2017), 2017, : 970 - 974