REAL-TIME MAXIMUM VALUE DETERMINATION ON AN EASILY TESTABLE VLSI ARCHITECTURE

被引：7
|
作者：
VAI, M
MOY, MM
机构：
[1] Department of Electrical and Computer Engineering, Northeastern University, Boston, MA
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS | 1993年 / 40卷 / 04期
关键词：
D O I：
10.1109/81.224304
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An algorithm is presented for determining the maximum value of n numerical elements on a VLSI architecture. The computational complexity of this algorithm does not depend on the number of elements so that it is suitable for real-time applications. The architecture is easily testable and a simple scheme for the generation of its test vectors is provided.
引用
收藏
页码：283 / 285
页数：3
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