MEASUREMENT OF VERY LOW TUNNELING CURRENT-DENSITY IN SIO2 USING THE FLOATING-GATE TECHNIQUE

被引:18
|
作者
FISHBEIN, B
KRAKAUER, D
DOYLE, B
机构
[1] Advanced Semiconductor Development Group, Digital Equipment Corporation, Hudson
关键词
D O I
10.1109/55.116965
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The floating-gate technique for measuring extremely low gate currents has been adapted to the measurement of Fowler-Nordheim tunneling currents in metal-oxide-semiconductor (MOS) capacitors. Using a special structure consisting of an MOS capacitor and a monitor transistor sharing a common-gate electrode, it has proved possible to measure tunneling current densities as low as 2 x 10(-13) A/cm2. The Fowler-Nordheim tunneling relationship was found to be obeyed over the entire measurable range of current density.
引用
收藏
页码:713 / 715
页数:3
相关论文
共 50 条
  • [21] Development of a measurement technique for current-density in PEFC using planar surface coil as a NMR signal detector (2nd Report, One-Dimensional measurement of current-density generating in PEFC at case of current flowing in lamination direction)
    Ogawa K.
    Yokouchi Y.
    Haishi T.
    Ito K.
    Nihon Kikai Gakkai Ronbunshu, B Hen/Transactions of the Japan Society of Mechanical Engineers, Part B, 2010, 76 (772): : 2210 - 2217
  • [22] A NEW GATE CURRENT SIMULATION TECHNIQUE CONSIDERING SI/SIO2 INTERFACE-TRAP GENERATION
    WEN, KS
    LI, HH
    WU, CY
    SOLID-STATE ELECTRONICS, 1995, 38 (04) : 851 - 859
  • [23] Development of a measurement technique for current-density in PEFC using planar surface coil as a NMR signal detector (1st report, one-dimensional measurement of current-density generating in PEFC)
    Yokouchi, Yasuo
    Ogawa, Kuniyasu
    Haishi, Tornoyuki
    Ito, Kohei
    Nihon Kikai Gakkai Ronbunshu, B Hen/Transactions of the Japan Society of Mechanical Engineers, Part B, 2009, 75 (752): : 839 - 846
  • [24] Direct tunneling stress-induced leakage current in ultrathin HfO2/SiO2 gate dielectric stacks
    Samanta, Piyas
    Man, Tsz Yin
    Zhang, Qingchun
    Zhu, Chunxiang
    Chan, Mansun
    JOURNAL OF APPLIED PHYSICS, 2006, 100 (09)
  • [25] A low-voltage full y-differential current-mode analog CMOS integrator using floating-gate MOSFETs
    Inoue, T
    Nakane, H
    Fukuju, Y
    Sánchez-Sinencio, E
    ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL IV: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 145 - 148
  • [26] Theoretical study of the SiO2/Si interface and its effect on energy band profile and MOSFET gate tunneling current
    朱晖文
    刘咏松
    毛凌峰
    沈静琴
    朱志艳
    唐为华
    Journal of Semiconductors, 2010, 31 (08) : 11 - 15
  • [27] Theoretical study of the SiO2/Si interface and its effect on energy band profile and MOSFET gate tunneling current
    Zhu Huiwen
    Liu Yongsong
    Mao Lingfeng
    Shen Jingqin
    Zhu Zhiyan
    Tang Weihua
    JOURNAL OF SEMICONDUCTORS, 2010, 31 (08)
  • [28] Si/SiO2 interface roughness study using Fowler-Nordheim tunneling current oscillations
    Lai, L.
    Irene, Gene
    1600, American Institute of Physics Inc. (87):
  • [29] Si/SiO2 interface roughness study using Fowler-Nordheim tunneling current oscillations
    Lai, L
    Irene, EA
    JOURNAL OF APPLIED PHYSICS, 2000, 87 (03) : 1159 - 1164
  • [30] Model for the trap-assisted tunnelling current through very thin SiO2/ZrO2 gate dielectric stacks
    Houssa, M
    Stesmans, A
    Heyns, MM
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2001, 16 (06) : 427 - 432