共 50 条
- [1] Efficient FPGA-based multistage two-path decimation filter for noise thermometer ICM 2001: 13TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS, 2001, : 161 - 164
- [3] FPGA implementation of a demux based on a multirate filter bank ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL V: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 353 - 356
- [4] FPGA implementation of hardware efficient adaptive filter robust to impulsive noise IET COMPUTERS AND DIGITAL TECHNIQUES, 2017, 11 (03): : 107 - 116
- [5] An Efficient Configurable Hardware Implementation of Fundamental Multirate Filter Banks 2008 5TH INTERNATIONAL MULTI-CONFERENCE ON SYSTEMS, SIGNALS AND DEVICES, VOLS 1 AND 2, 2008, : 459 - 463
- [6] Design and Research of Digital Decimation Filter Based on FPGA VIBRATION, STRUCTURAL ENGINEERING AND MEASUREMENT I, PTS 1-3, 2012, 105-107 : 2086 - 2091
- [7] FPGA Based Hardware Implementation of Image Filter With Dynamic Reconfiguration Architecture INTERNATIONAL JOURNAL OF COMPUTER SCIENCE AND NETWORK SECURITY, 2006, 6 (12): : 121 - 127
- [8] FPGA hardware implementation of an RNS FIR digital filter CONFERENCE RECORD OF THE THIRTY-FIFTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS, VOLS 1 AND 2, 2001, : 1340 - 1344
- [10] FPGA Implementation of Adaptive Filter for Noise Cancellation 2014 INTERNATIONAL CONFERENCE ON ELECTRONICS AND COMMUNICATION SYSTEMS (ICECS), 2014,