LOMACH - A MOS CIRCUIT MASK CHECKING LOGIC SIMULATOR

被引:2
|
作者
SZANTO, L
机构
关键词
D O I
10.1016/0010-4485(82)90055-0
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
引用
收藏
页码:313 / 319
页数:7
相关论文
共 50 条
  • [41] MOTIS - MOS TIMING SIMULATOR
    CHAWLA, BR
    GUMMEL, HK
    KOZAK, P
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1975, 22 (12): : 901 - 910
  • [42] Battery simulator circuit
    Ravid, A
    ELECTRONIC DESIGN, 1996, 44 (17) : 118 - 118
  • [43] VWSIM: A Circuit Simulator
    Hunt Jr, Warren A.
    Ramanathan, Vivek
    Moore, J. Strother
    ELECTRONIC PROCEEDINGS IN THEORETICAL COMPUTER SCIENCE, 2022, (359): : 61 - 75
  • [44] Simulator circuit breaker
    Birch, S
    AEROSPACE ENGINEERING, 2001, 21 (08) : 16 - 16
  • [45] Design of quaternary logic gate using double pass-transistor logic with neuron MOS down literal circuit
    Park, SJ
    Yoon, BH
    Yoon, KS
    Kim, HS
    34TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS, 2004, : 198 - 203
  • [46] CHOOSING A CIRCUIT SIMULATOR
    DOMITROWICH, J
    VLSI SYSTEMS DESIGN, 1986, 7 (09): : 90 - 92
  • [47] A circuit simulator of the SITh
    Fukase, Masa-aki
    Nakamura, Tadao
    Nishizawa, Jun-ichi
    IEEE Transactions on Power Electronics, 1992, 7 (03) : 581 - 591
  • [48] Temporal logic and model checking
    McMillan, KL
    VERIFICATION OF DIGITAL AND HYBRID SYSTEM, 2000, 170 : 36 - 54
  • [49] Model Checking of Spatial Logic
    Li, Tengfei
    Liu, Jing
    Kang, JieXiang
    Sun, Haiying
    Chen, Xiaohong
    Han, Li
    2020 27TH ASIA-PACIFIC SOFTWARE ENGINEERING CONFERENCE (APSEC 2020), 2020, : 169 - 177
  • [50] Temporal logic model checking
    Clarke, EM
    LOGIC PROGRAMMING - PROCEEDINGS OF THE 1997 INTERNATIONAL SYMPOSIUM, 1997, : 3 - 3