A FASTBUS MODULE FOR TRIGGER APPLICATIONS BASED ON A DIGITAL SIGNAL PROCESSOR AND ON PROGRAMMABLE GATE ARRAYS

被引:1
|
作者
BATTAIOTTO, P
COLAVITA, A
FRATNIK, F
LANCERI, L
机构
[1] UNIV UDINE,IST FIS,I-33100 UDINE,ITALY
[2] IST NAZL FIS NUCL,ICTP,MICROPROCESSOR LAB,I-34013 TRIESTE,ITALY
关键词
D O I
10.1016/0168-9002(91)90467-5
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
The new generation of DSP microprocessors based on RISC and Harvard-like architectures can conveniently take the place of specially built processors in fast trigger circuits for high-energy physics experiments. Presently available programmable gate arrays are well matched to them in speed and contribute to simplify the design of trigger circuits. Using these components, we designed and constructed a Fastbus module. We describe an application for the total-energy trigger of DELPHI, performing the readout of digitized calorimeter trigger data and some simple computations in less than 3-mu-s.
引用
收藏
页码:265 / 268
页数:4
相关论文
共 50 条
  • [1] Realization of a neuronal hardware with digital signal processor and programmable gate arrays
    MeyerBase, A
    [J]. FREQUENZ, 1997, 51 (1-2) : 50 - 54
  • [2] Hybrid opto-digital joint transform correlator based in a digital signal processor(DSP) or a field programmable gate arrays (FPGA)
    Serrano-Heredia, A
    Hinojosa, CM
    Hinojosa, R
    Rodríguez-Dagnino, R
    Molina-Hernández, L
    Briones, R
    Ponce, R
    Jolibois, M
    [J]. ELECTRO-OPTICAL SYSTEM DESIGN, SIMULATION, TESTING AND TRAINING, 2002, 4772 : 136 - 143
  • [3] PROGRAMMABLE DIGITAL SIGNAL PROCESSOR EVALUATED FOR RADAR APPLICATIONS
    KELLY, RR
    CHARTON, S
    [J]. MICROWAVE JOURNAL, 1979, 22 (02) : 62 - 66
  • [4] Novel programmable digital signal processor for multimedia applications
    Lin, LC
    Lin, TJ
    Lee, CC
    Chao, CM
    Chen, SK
    Liu, CH
    Hsiao, PC
    Liu, CW
    Jen, CW
    [J]. PROCEEDINGS OF THE 2004 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1 AND 2: SOC DESIGN FOR UBIQUITOUS INFORMATION TECHNOLOGY, 2004, : 121 - 124
  • [5] On mapping digital signal processing algorithms into field programmable gate arrays
    Wyrzykowski, R.
    Sergyienko, A.
    Kanevski, J.
    [J]. Engineering Simulation, 2001, 18 (02): : 217 - 225
  • [6] ARCHITECTURE OF A PROGRAMMABLE DIGITAL SIGNAL PROCESSOR
    SHIVELY, RR
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1982, 31 (01) : 16 - 22
  • [7] DESIGN CONSIDERATIONS OF A PROGRAMMABLE PREDETECTION DIGITAL SIGNAL PROCESSOR FOR RADAR APPLICATIONS
    SHAY, BP
    [J]. REPORT OF NRL PROGRESS, 1972, (SEP): : 33 - 34
  • [8] An Undergraduate Course and Laboratory in Digital Signal Processing With Field Programmable Gate Arrays
    Meyer-Baese, Uwe
    Vera, Alonzo
    Meyer-Baese, Anke
    Pattichis, Marios S.
    Perry, Reginald J.
    [J]. IEEE TRANSACTIONS ON EDUCATION, 2010, 53 (04) : 638 - 645
  • [9] EFFICIENT IMPLEMENTATION OF DIGITAL SIGNAL PROCESSING ALGORITHMS WITH FIELD PROGRAMMABLE GATE ARRAYS
    Damian, C.
    Fosalau, C.
    Zet, C.
    Ilinca, M.
    [J]. MANAGEMENT OF TECHNOLOGICAL CHANGES, VOL 1, 2009, : 613 - 616
  • [10] A digital magnetic resonance imaging spectrometer using digital signal processor and field programmable gate array
    Xiao Liang
    Sun Binghe
    Ma Yueping
    Zhao Ruyan
    [J]. REVIEW OF SCIENTIFIC INSTRUMENTS, 2013, 84 (05):