共 50 条
- [1] DIAGNOSIS OF MULTIPLE FAULTS IN COMBINATIONAL CIRCUITS [J]. ELECTRONICS & COMMUNICATIONS IN JAPAN, 1969, 52 (04): : 123 - +
- [2] Identification of Redundant Faults in Combinational Circuits [J]. 1600, John Wiley and Sons Inc. (31):
- [3] IDENTIFICATION OF UNDETECTABLE FAULTS IN COMBINATIONAL-CIRCUITS [J]. PROCEEDINGS - IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN : VLSI IN COMPUTERS & PROCESSORS, 1989, : 290 - 293
- [4] Modeling for bridging faults in nMOS combinational circuits [J]. MICROELECTRONICS AND RELIABILITY, 1997, 37 (05): : 763 - 777
- [7] GRAPHICAL REPRESENTATION OF COMBINATIONAL-CIRCUITS [J]. AVTOMATIKA I VYCHISLITELNAYA TEKHNIKA, 1990, (06): : 59 - 65
- [8] DIAGNOSIS OF MULTIPLE FAULTS IN COMBINATIONAL DIGITAL CIRCUITS BY MODELING OF TRANSITION PROPAGATION ALONG CRITICAL PATHS [J]. IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 1992, 139 (05): : 594 - 606
- [9] DIAGNOSIS OF GROUP BRIDGING FAULTS IN COMBINATIONAL-CIRCUITS [J]. AVTOMATIKA I VYCHISLITELNAYA TEKHNIKA, 1983, (01): : 77 - 78