Identification of Redundant Faults in Combinational Circuits

An efficient redundant-fault identification method is useful for test pattern generation. The authors earlier proposed a method for redundant fault identification of combinational circuits that consisted of the procedures regarding the fan-out stems used in the FIRE algorithm [12, 13] and the analysis of target faults [17]. But it was shown that the method identifies more redundant faults than those found in FIRE, with a problem of long CPU times. In this paper, implications are extended in order to identify more redundant faults; and in order to accelerate the process, parallel operations are introduced into both the procedures of fan-out stems and analysis of the target faults. Further, programs are developed for the proposed method and are applied to the benchmark circuits to verify the effectiveness of the method. The experimental results show the possibility of fast identification of larger numbers of redundant faults than in previous methods. © 2000 Scripta Technica.