I-DDQ TEST AND DIAGNOSIS OF CMOS CIRCUITS

被引：0
|
作者：
ISERN, E
FIGUERAS, J
机构：
来源：
IEEE DESIGN & TEST OF COMPUTERS | 1995年 / 12卷 / 04期
关键词：
D O I：
10.1109/MDT.1995.473314
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Designers must target realistic faults if they desire high-quality test and diagnosis of CMOS circuits. The authors propose a strategy for generating high-quality I-DDQ test patterns for bridging faults. They use a standard ATPG tool for stuck-at faults that adapts to target bridging faults via I-DDQ testing. The authors discuss I-DDQ test set diagnosis capability and specifically generated vectors that can improve diagnosability, and provide test and diagnosis results for benchmark circuits.
引用
收藏
页码：60 / 67
页数：8
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