A low-power 20 GSps track-and-hold amplifier in 0.18 mu m SiGe BiCMOS technology

被引:0
|
作者
Tang Kai [1 ,2 ]
Meng Qiao [1 ,2 ]
Wang Zhigong [1 ,2 ]
Zhang Yi [1 ,2 ]
Yin Kuai [1 ,2 ]
Guo Ting [1 ,2 ]
机构
[1] Southeast Univ, Inst RF & OE ICs, Nanjing 210096, Jiangsu, Peoples R China
[2] Minist Educ, Engn Res Ctr RF ICs & RF Syst, Nanjing 210096, Jiangsu, Peoples R China
关键词
track-and-hold amplifier (THA); ADC; ultra-high-speed; SiGe BiCMOS; low power;
D O I
10.1088/1674-4926/34/9/095002
中图分类号
O469 [凝聚态物理学];
学科分类号
070205 ;
摘要
An open-loop 20 GSps track-and-hold amplifier (THA) using fully-differential architecture to mitigate common-mode noise and suppress even-order harmonics is presented. CMOS switch and dummy switches are adopted to achieve high speed and good linearity. A cross-coupled pair is used in the input buffer to suppress the charge injection and clock feedthrough. Both the input and output buffers use an active inductor load to achieve high signal bandwidth. The THA is realized with 0.18 mu m SiGe BiCMOS technology using only CMOS devices at a 1.8 V voltage supply and with a core area of 0.024 mm(2). The measurement results show that the SFDR is 32.4 dB with a 4 GHz sine wave input at a 20 GSps sampling rate, and the third harmonic distortion is 48 dBc. The effective resolution bandwidth of the THA is 12 GHz and the figure of merit is only 0.028 mW/GHz.
引用
收藏
页数:5
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