CMOS CURRENT-MODE WINNER-TAKE-ALL CIRCUIT WITH DISTRIBUTED HYSTERESIS

被引：22
|
作者：
DEWEERTH, SP
MORRIS, TG
机构：
[1] School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta
来源：
ELECTRONICS LETTERS | 1995年 / 31卷 / 13期
关键词：
WINNER TAKE ALL; CURRENT-MODE CIRCUITS;
D O I：
10.1049/el:19950729
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An analogue-VLSI winner-take-all circuit is enhanced through the addition of hysteretic feedback that emphasises the spatial locality of competing signals using a resistive network. This circuit has applications to tasks in areas such as image processing, in which inputs are not stationary with respect to the circuit array.
引用
收藏
页码：1051 / 1053
页数：3
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