GRAPH-OPTIMIZATION TECHNIQUES FOR IC LAYOUT AND COMPACTION

被引：21

作者：

KEDEM, G ^{[1
]}

WATANABE, H ^{[1
]}

机构：

[1] UNIV ROCHESTER,DEPT COMP SCI,ROCHESTER,NY 14627

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 1984年 / 3卷 / 01期

关键词：

D O I：

10.1109/TCAD.1984.1270052

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：12 / 20

页数：9

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