PERFORMANCE TRADEOFFS IN MULTITHREADED PROCESSORS

被引:50
|
作者
AGARWAL, A
机构
[1] Laboratory for Computer Science, Massachusetts Institute of Technology, Cambridge, MA
关键词
CACHE MEMORIES; INTERCONNECTION NETWORKS; MULTIPROCESSORS; MULTITHREADING; PARALLEL PROCESSING; PERFORMANCE ANALYSIS; PIPELINED PROCESSOR; RAPID CONTEXT SWITCHING;
D O I
10.1109/71.159037
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
High network latencies in large-scale multiprocessors can cause a significant drop in processor utilization. By maintaining multiple process contexts in hardware and switching among them in a few cycles, multithreaded processors can overlap computation with memory accesses and reduce processor idle time. This paper presents an analytical performance model for multithreaded processors that includes cache interference, network contention, context-switching overhead, and data-sharing effects. The model is validated through our own simulations and by comparison with previously published simulation results. Our results indicate that processors can substantially benefit from multithreading, even in systems with small caches, provided sufficient network bandwidth exists. Caches that are much larger than the working-set sizes of individual processes yield close to full processor utilization with as few as two to four contexts. Smaller caches require more contexts to keep the processor busy, while caches that are comparable in size to the working-sets of individual processes cannot achieve a high utilization regardless of the number of contexts. Increased network contention due to multithreading has a major effect on performance. The available network bandwidth and the context-switching overhead limits the best possible utilization.
引用
收藏
页码:525 / 539
页数:15
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