SOURCE AND DRAIN RESISTANCE DETERMINATION FOR MOSFETS

被引：17
|
作者：
SEAVEY, MH
机构：
来源：
IEEE ELECTRON DEVICE LETTERS | 1984年 / 5卷 / 11期
关键词：
D O I：
10.1109/EDL.1984.25995
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：479 / 481
页数：3
相关论文
共 50 条
  • [31] Asymmetric InGaAs/InP MOSFETs With Source/Drain Engineering
    Mo, Jiongjiong
    Lind, Erik
    Wernersson, Lars-Erik
    IEEE ELECTRON DEVICE LETTERS, 2014, 35 (05) : 515 - 517
  • [32] Asymmetric InGaAs MOSFETs with InGaAs source and InP drain
    Mo, Jiongjiong
    Lind, Erik
    Wernersson, Lars-Erik
    26TH INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALS (IPRM), 2014,
  • [33] Towards Schottky-Barrier Source/Drain MOSFETs
    Ostling, Mikael
    Gudmundsson, Valur
    Hellstrom, Per-Erik
    Malm, B. Gunnar
    Zhang, Zhen
    Zhang, Shi-Li
    2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 146 - +
  • [34] Impact of Source-Drain Series Resistance on Drain Current Mismatch in Advanced Fully Depleted SOI n-MOSFETs
    Ioannidis, E. G.
    Theodorou, C. G.
    Haendler, S.
    Josse, E.
    Dimitriadis, C. A.
    Ghibaudo, G.
    IEEE ELECTRON DEVICE LETTERS, 2015, 36 (05) : 433 - 435
  • [35] Impact of substrate resistance on drain current noise in MOSFETs
    Goo, JS
    Donati, S
    Choi, CH
    Yu, ZP
    Lee, TH
    Dutton, RW
    SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2001, 2001, : 182 - 185
  • [36] Proposal of pseudo source and drain MOSFETs for evaluating 10-nm gate MOSFETs
    Kawaura, H
    Sakamoto, T
    Baba, T
    Ochiai, Y
    Fujita, J
    Matsui, S
    Sone, J
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1997, 36 (3B): : 1569 - 1573
  • [37] Selenium Segregation for Lowering the Contact Resistance in Ultrathin-Body MOSFETs With Fully Metallized Source/Drain
    Wong, Hoong-Shing
    Chan, Lap
    Samudra, Ganesh
    Yeo, Yee-Chia
    IEEE ELECTRON DEVICE LETTERS, 2009, 30 (10) : 1087 - 1089
  • [38] Computational Study of Geometrical Designs for Source/Drain Contacts to Reduce Parasitic Resistance in Extremely Scaled MOSFETs
    Kim, Raseong
    Avci, Uygar E.
    Young, Ian A.
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (03) : 1189 - 1196
  • [39] Determination of physical mechanisms contributing to the difference between drain and source resistances in short-channel MOSFETs
    OrtizConde, A
    Liou, JJ
    Narayanan, R
    Sanchez, FJG
    SOLID-STATE ELECTRONICS, 1996, 39 (02) : 211 - 215
  • [40] On the DC extraction of the asymmetric parasitic source and drain resistances for MOSFETs
    Rodriguez-Davila, Rodolfo
    Ortiz-Conde, Adelmo
    Avila-Avendano, Carlos
    Shamsi, Zeshaan
    Quevedo-Lopez, Manuel A.
    SOLID-STATE ELECTRONICS, 2020, 164
12345