BEHAVIORAL VERSUS STRUCTURAL FAULTS IN DIGITAL CIRCUITS

被引：0
|
作者：
HUEY, BM
机构：
来源：
VLSI SYSTEMS DESIGN | 1986年 / 7卷 / 06期
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：12 / 12
页数：1
相关论文
共 50 条
  • [1] LOCALIZATION OF FAULTS IN DIGITAL CIRCUITS
    GROBMAN, DM
    [J]. AVTOMATIKA I VYCHISLITELNAYA TEKHNIKA, 1983, (02): : 79 - 84
  • [2] TESTING FOR INTERMITTENT FAULTS IN DIGITAL CIRCUITS
    BREUER, MA
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1973, C 22 (03) : 241 - 246
  • [3] NEW REPRESENTATION FOR FAULTS IN COMBINATIONAL DIGITAL CIRCUITS
    SCHERTZ, DR
    METZE, G
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1972, C 21 (08) : 858 - +
  • [4] Intermittent Resistive Faults in Digital CMOS Circuits
    Kerkhoff, Hans G.
    Ebrahimi, H.
    [J]. 2015 IEEE 18TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS 2015), 2015, : 211 - 216
  • [5] SIMULATION AND ANALYSIS OF TRANSIENT FAULTS IN DIGITAL CIRCUITS
    YANG, FL
    SALEH, RA
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (03) : 258 - 264
  • [6] Investigation of Intermittent Resistive Faults in Digital CMOS Circuits
    Kerkhoff, Hans G.
    Ebrahimi, Hassan
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2016, 25 (03)
  • [7] LOGIC SCOPES SPEED DIAGNOSIS OF FAULTS IN DIGITAL CIRCUITS
    MARSHALL, M
    [J]. ELECTRONICS, 1974, 47 (20): : 119 - 123
  • [8] Detection of Crosstalk Faults in Digital Circuits by Testability Evaluation
    Chen Ling
    Pan Zhongliang
    [J]. ADVANCED MEASUREMENT AND TEST, PARTS 1 AND 2, 2010, 439-440 : 1241 - 1246
  • [9] Detecting Intermittent Resistive Faults in Digital CMOS Circuits
    Ebrahimi, Hassan
    Rohani, Alireza
    Kerkhoff, Hans G.
    [J]. 2016 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT), 2016, : 87 - 90
  • [10] An approach to evaluating the effects of realistic faults in digital circuits
    Kalbarczyk, Z
    Patel, J
    Lee, MS
    Iyer, RK
    [J]. TWELFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1999, : 260 - 265
12345