共 50 条
- [41] DTMF signals detector using multiplier-less resonators [J]. IEEJ Trans. Electron. Inf. Syst., 2006, 5 (596-602):
- [43] The Optimal Design Method of FIR Filter Using the Improved Genetic Algorithm [J]. PROCEEDINGS OF THE 2014 9TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS (ICIEA), 2014, : 452 - +
- [44] Design of FIR Filter using Novel Pipelined Bypass Multiplier [J]. 2017 IEEE 3RD INTERNATIONAL SYMPOSIUM IN ROBOTICS AND MANUFACTURING AUTOMATION (ROMA), 2017,
- [45] High Speed Multiplier for FIR Filter Design using Window [J]. 2014 INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND INTEGRATED NETWORKS (SPIN), 2014, : 486 - 491
- [46] Multiplier-less realization of a poly-phase filter using LUT-based FPGAs [J]. FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS: RECONFIGURABLE COMPUTING IS GOING MAINSTREAM, 2002, 2438 : 192 - 201
- [48] Sparse FIR Filter Design Based on Genetic Algorithm [J]. 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 97 - 100
- [50] Improved genetic algorithm based FIR filter design [J]. WCICA 2006: SIXTH WORLD CONGRESS ON INTELLIGENT CONTROL AND AUTOMATION, VOLS 1-12, CONFERENCE PROCEEDINGS, 2006, : 3476 - +