Real-time reconfigurable cache for low-power embedded systems

被引:3
|
作者
Jheng, Geng-Cyuan [1 ]
Duh, Dyi-Rong [1 ]
Lai, Cheng-Nan [2 ]
机构
[1] Natl Chi Nan Univ, Dept Comp Sci & Informat Engn, Nantou 54561, Taiwan
[2] Natl Kaohsiung Marine Univ, Dept Informat Management, Kaohsiung 81143, Taiwan
关键词
cache; reconfigurable cache; embedded systems; power consumption; benchmark;
D O I
10.1504/IJES.2010.039027
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Modern embedded systems execute a small set of applications or even a single one repeatedly. Specialising cache configurations to a particular application is well-known to have great benefits on performance and power. However, the fact that the behaviour of an application varies from phase to phase has been shown in recent years. Tuning cache configuration to fit a target application in different phases gives a further improvement in power consumption. This work presents a mechanism which determines the optimal configurations in different phases during an execution process. By applying corresponding cache configuration for each time interval of an execution process on L1 instruction cache, this work shows that on average 91.6% energy saving is obtained by comparing with average energy consumption of all four-way set-associative caches in search space. On average 5.29% power reduction is achieved by comparing with energy consumption of benchmarks with their respective global optimal cache configurations.
引用
收藏
页码:235 / 247
页数:13
相关论文
共 50 条
  • [31] Efficient Workload Adaptive Scheme for Low-power Real-time Systems
    Zhang Zhe
    Hu Chen
    Qian Dejun
    [J]. CHINESE JOURNAL OF ELECTRONICS, 2010, 19 (04) : 603 - 607
  • [32] Design-Time Verification of Reconfigurable Real-Time Embedded Systems
    Krichen, Fatma
    Hamid, Brahim
    Zalila, Bechir
    Jmaiel, Mohamed
    [J]. 2012 IEEE 14TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS & 2012 IEEE 9TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (HPCC-ICESS), 2012, : 1487 - 1494
  • [33] Low-power and real-time address translation through arithmetic operations for virtual memory support in embedded systems
    Zhou, X.
    Petrov, P.
    [J]. IET COMPUTERS AND DIGITAL TECHNIQUES, 2008, 2 (02): : 75 - 85
  • [34] A Hybrid real-time component model for reconfigurable embedded systems
    Gui, Ning
    De Florio, Vincenzo
    Sun, Hong
    Blondia, Chris
    [J]. APPLIED COMPUTING 2008, VOLS 1-3, 2008, : 1590 - 1596
  • [35] Real-time and approximate iterative optical flow implementation on low-power embedded CPUs
    Millet, Maxime
    Cassagne, Adrien
    Rambaux, Nicolas
    Lacassagne, Lionel
    [J]. 2023 IEEE 34TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, ASAP, 2023, : 135 - 138
  • [36] A Reconfigurable Streaming Processor for Real-Time Low-Power Execution of Convolutional Neural Networks at the Edge
    Sanchez, Justin
    Soltani, Nasim
    Kulkarni, Pratik
    Chamarthi, Ramachandra Vikas
    Tabkhi, Hamed
    [J]. EDGE COMPUTING - EDGE 2018, 2018, 10973 : 49 - 64
  • [37] Instruction cache organisation for embedded low-power processors
    Jung, CW
    Kim, J
    [J]. ELECTRONICS LETTERS, 2001, 37 (09) : 554 - 555
  • [38] System-level synthesis of low-power hard real-time systems
    Kirovski, D
    Potkonjak, M
    [J]. DESIGN AUTOMATION CONFERENCE - PROCEEDINGS 1997, 1997, : 697 - 702
  • [39] Dynamic Low-Power Reconfiguration of Real-Time Systems With Periodic and Probabilistic Tasks
    Wang, Xi
    Khemaissia, Imen
    Khalgui, Mohamed
    Li, ZhiWu
    Mosbahi, Olfa
    Zhou, MengChu
    [J]. IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, 2015, 12 (01) : 258 - 271
  • [40] Reconfigurable cache for real-time MPSoCs: Scheduling and implementation
    Chen, Gang
    Hu, Biao
    Huang, Kai
    Knoll, Alois
    Huang, Kai
    Liu, Di
    Stefanov, Todor
    Li, Feng
    [J]. MICROPROCESSORS AND MICROSYSTEMS, 2016, 42 : 200 - 214