Analytical modeling of a dual-material graded-channel cylindrical gate-all-around FET to minimize the short-channel effects

In this paper, an analytical model for center potential and threshold voltage is developed for a dual-material graded-channel cylindrical gate-all-around (DMGC CGAA) FET by integrating gate engineering and channel engineering. The potential distribution of the device is determined by solving the two-dimensional (2-D) Poisson equation in cylindrical coordinates with suitable boundary conditions by applying the parabolic approximation method. The threshold voltage (Vth) is calculated from the minimum center potential in the channel. The center potentials of single-material graded-channel cylindrical gate-all-around (SMGC CGAA) field effect transistors (FETs) and DMGC CGAA FETs are compared, and the optimum values are determined by varying the different device parameters of the DMGC CGAA FETs. The short-channel effects (SCEs) including threshold voltage (Vth) roll-off, hot carrier effect (HCE) and drain-induced barrier lowering (DIBL) are examined. The effects of oxide thickness (tox) and cylinder diameter (tsi) on the Vth are also investigated. The proposed model results are in agreement with the simulation results using technology computer-aided design (TCAD).