Ultra high gain CMOS Op-Amp design using self-cascoding and positive feedback

被引：0

作者：

Subhra Chakraborty

Abhishek Pandey

Vijay Nath

机构：

[1] Birla Institute of Technology,VLSI Design Group, Department of Electronics and Communication Engineering

[2] Mesra,undefined

来源：

Microsystem Technologies | 2017年 / 23卷

关键词：

Positive Feedback; Positive Feedback Circuit; Positive Feedback Technique; Slew Rate; Phase Margin;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

This paper presents an ultra high gain two stage CMOS Operational Amplifier which is designed using self-cascoding and positive feedback technique in order to provide gain enhancement. By comparing the circuit with other designed circuits it has been shown that applying positive feedback increases the gain of the Op-Amp without affecting other properties of the amplifier. The proposed circuit is designed in 45 nm technology using Cadence Virtuoso Analog Design Environment tool at ±1 V supply. The Op-Amp is designed to achieve a high gain of 141 dB while maintaining a UGB of 101 MHz and phase margin of 60°. The simulation results conforms the estimated theoretical improvements. The dependence of various properties such as slew rate, UGB, settling time and phase margin of the designed Op-Amp on compensating capacitor CC has also been analyzed in this paper. Finally, the simulation results have been compared with a previously reported Op-Amp utilizing positive feedback technique.

引用

页码：541 / 552

页数：11

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