1-V bulk-driven CMOS analog programmable winner-takes-all circuit

被引：0
|
作者：
Yu-Cherng Hung
Bin-Da Liu
Chung-Yang Tsai
机构：
[1] National Chin-Yi Institute of Technology,
来源：
Analog Integrated Circuits and Signal Processing | 2006年 / 49卷
关键词：
-WTA; -LTA; WTA; Low voltage;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
In this paper, a 1-V bulk-driven analog winner-takes-all circuit with programmable k-winners capability is proposed. By presetting a set of binary bits, the desired k-winners-take-all or k-losers-take-all function is programmable. The proposed upward-and-downward searching greatly improves the response time. The chip has been fabricated with a 0.25-μm CMOS technology. Simulated results show that the response time of the winner-takes-all circuit is 50 μs under 5-mV identified resolution. The input range is approximately to be rail-to-rail.
引用
收藏
页码：53 / 61
页数：8
相关论文
共 50 条
  • [41] A 1-V analog CMOS front-end for detecting QRS complexes in a cardiac signal
    Lasanen, K
    Kostamovaara, J
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2005, 52 (12) : 2584 - 2594
  • [42] Low-power 1V 5.8 GHz bulk-driven mixer with on-chip balun in 0.18μm CMOS
    Van Vorst, Daryl
    Mirabbasi, Shahriar
    2008 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, VOLS 1 AND 2, 2008, : 175 - 178
  • [43] A PROGRAMMABLE 1-V CMOS 65 nm FREQUENCY SYNTHESIZER DESIGN IN 60 GHz WIRELESS TRANSCEIVER
    Hsiao, Sen-Wen
    Leung, Matthew Chung-Hin
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2012, 21 (06)
  • [44] Single-pair bulk-driven CMOS input stage: A compact low-voltage analog cell for scaled technologies
    Carrillo, Juan M.
    Torelli, Guido
    Perez-Aloe, Raquel
    Valverde, Jose M.
    Francisco Duque-Carrillo, J.
    INTEGRATION-THE VLSI JOURNAL, 2010, 43 (03) : 251 - 257
  • [45] 0.4-V, 81.3-nA Bulk-Driven Single-Stage CMOS OTA with Enhanced Transconductance
    Ballo, Andrea
    Grasso, Alfio Dario
    Pennisi, Salvatore
    ELECTRONICS, 2022, 11 (17)
  • [46] A 0.5-V 0.02% THD Bulk-Driven OTA for Continuous-Time Applications in 180 nm CMOS
    Xiang, Yangxin
    Yao, Huajun
    Jiang, Minghao
    Chen, Junkun
    Chen, Yongzhen
    Wu, Jiangfeng
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2024, 71 (10) : 4420 - 4433
  • [47] A Sub-1-V Bulk-Driven Opamp With an Effective Transconductance-Stabilizing Technique
    Tang, Nghia
    Hong, Wookpyo
    Kim, Jong-Hoon
    Yang, Youngoo
    Heo, Deukhyoun
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2015, 62 (11) : 1018 - 1022
  • [48] A new bulk-driven input stage design for sub 1-volt CMOS op-amps
    Haga, Yasutaka
    Morling, Richard C. S.
    Kale, Izzet
    2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 1547 - 1550
  • [49] 1-V Low-Power High-Accuracy CMOS Potentiostat Circuit for Amperometric Sensor
    Trakoolwattana, Rungtrakool
    Thanachayanont, Apinunt
    2014 11TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING/ELECTRONICS, COMPUTER, TELECOMMUNICATIONS AND INFORMATION TECHNOLOGY (ECTI-CON), 2014,
  • [50] A 1-V CMOS analog comparator using auto-zero and complementary differential-input technique
    Hung, YC
    Liu, BD
    2002 IEEE ASIA-PACIFIC CONFERENCE ON ASIC PROCEEDINGS, 2002, : 181 - 184
12345