Design and Evaluation of CNFET-Based Quaternary Circuits

被引:0
|
作者
Mohammad Hossein Moaiyeri
Keivan Navi
Omid Hashemipour
机构
[1] Shahid Beheshti University,Faculty of Electrical and Computer Engineering
[2] G. C.,Nanotechnology and Quantum Computing Lab
[3] Shahid Beheshti University,Microelectronics Lab
[4] G. C.,undefined
[5] Shahid Beheshti University,undefined
[6] G. C.,undefined
来源
Circuits, Systems, and Signal Processing | 2012年 / 31卷
关键词
Carbon nanotube FET (CNFET); Quaternary logic; Arithmetic and logic circuits; Multiple-; design; Nanoelectronics;
D O I
暂无
中图分类号
学科分类号
摘要
This paper presents novel high-performance and PVT tolerant quaternary logic circuits as well as efficient quaternary arithmetic circuits for nanoelectronics. These Carbon Nanotube FET (CNFET)-based circuits are compatible with the recent technologies and are designed based on the conventional CMOS architecture, while the previous quaternary designs used methods which are not suitable for nanoelectronics and have become obsolete. The proposed designs are robust and have large noise margins and high driving capability. The singular characteristics of CNFETs, such as the capability of having the desired threshold voltage by regulating the diameters of the nanotubes, make them very appropriate for voltage-mode multiple-threshold circuits design. The proposed circuits are examined, using Synopsys HSPICE with the standard 32 nm-CNFET technology in various situations and different supply voltages. Simulation results demonstrate the correct and high-performance operation of the proposed circuits even in the presence of process, voltage and temperature variations.
引用
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页码:1631 / 1652
页数:21
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