A High-Order Temperature-Compensated Subthreshold Voltage Reference Using Channel Length Modulation Compensation Technique

被引:0
|
作者
Arvind Thakur
Rishikesh Pandey
Shireesh Kumar Rai
机构
[1] ECED,
[2] TIET,undefined
来源
关键词
CMOS; High-order; Line sensitivity; Subthreshold; Compensation; Voltage reference;
D O I
暂无
中图分类号
学科分类号
摘要
The paper presents a novel high-order temperature-compensated subthreshold voltage reference that utilizes temperature characteristics of the gate-to-source voltage of subthreshold MOS transistor. The proposed high-order temperature-compensated voltage reference has been designed using two CMOS voltage references and a current subtraction circuit to achieve a low temperature coefficient over a wide temperature range. The proposed circuit offers an output reference voltage of 250.8 mV, line sensitivity of 0.0674%/V and temperature coefficient of 37.4 ppm/°C for the temperature range varying from − 20 ∘C\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\mathrm{^\circ{\rm C} }$$\end{document} to 140 °C at nominal conditions. The power supply rejection ratio is obtained as − 46.02 dB at a frequency of 100 Hz and − 41.91 dB at a frequency of 1 MHz. The proposed circuit shows an output noise of 1.86 μV/√Hz\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\mathrm{\mu V}/\surd \mathrm{Hz}$$\end{document} at 100 Hz and 259.72 nV/√Hz\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\mathrm{nV}/\surd \mathrm{Hz}$$\end{document} at 1 MHz. The proposed circuit has been designed in BSIM3V3 180 nm CMOS technology using Cadence tool. The corner analysis of the proposed circuit has also been performed to show its performance in extreme conditions. The proposed circuit occupies a small chip area of 51 μ\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\upmu$$\end{document}m × 75.3 μ\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\upmu$$\end{document}m.
引用
收藏
页码:263 / 284
页数:21
相关论文
共 50 条
  • [1] A High-Order Temperature-Compensated Subthreshold Voltage Reference Using Channel Length Modulation Compensation Technique
    Thakur, Arvind
    Pandey, Rishikesh
    Rai, Shireesh Kumar
    WIRELESS PERSONAL COMMUNICATIONS, 2022, 126 (01) : 263 - 284
  • [2] Novel high PSRR high-order temperature-compensated subthreshold MOS bandgap reference
    Zhou Qianneng
    Zhu Ling
    Li Hongjuan
    Lin Jinzhao
    Wang Liangcai
    Luo Wei
    The Journal of China Universities of Posts and Telecommunications, 2017, (06) : 74 - 82
  • [3] Novel high PSRR high-order temperature-compensated subthreshold MOS bandgap reference
    Qianneng Z.
    Ling Z.
    Hongjuan L.
    Jinzhao L.
    Liangcai W.
    Wei L.
    Qianneng, Zhou (zhouqn@cqupt.edu.cn), 1600, Beijing University of Posts and Telecommunications (24): : 74 - 82
  • [4] Novel high PSRR high-order temperature-compensated subthreshold MOS bandgap reference
    Zhou Qianneng
    Zhu Ling
    Li Hongjuan
    Lin Jinzhao
    Wang Liangcai
    Luo Wei
    The Journal of China Universities of Posts and Telecommunications, 2017, 24 (06) : 74 - 82
  • [5] A 0.52 ppm/°C high-order temperature-compensated voltage reference
    Yonggen Liu
    Zhaoji Li
    Ping Luo
    Bo Zhang
    Analog Integrated Circuits and Signal Processing, 2010, 62 : 17 - 21
  • [6] A 0.52 ppm/A°C high-order temperature-compensated voltage reference
    Liu, Yonggen
    Li, Zhaoji
    Luo, Ping
    Zhang, Bo
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2010, 62 (01) : 17 - 21
  • [7] A High-order Temperature-compensated Bandgap Voltage Reference with Low Temperature Coefficient
    Huang, Shalin
    Li, Mingdong
    Yin, Peng
    Tang, Fang
    2022 IEEE INTERNATIONAL IOT, ELECTRONICS AND MECHATRONICS CONFERENCE (IEMTRONICS), 2022, : 766 - 770
  • [8] A high-order curvature compensation technique for bandgap voltage reference using subthreshold MOSFETs
    Adl, Ahmad-Hossein
    El-Sankary, Kamal
    El-Masry, Ezz
    INTERNATIONAL JOURNAL OF ELECTRONICS, 2010, 97 (07) : 783 - 796
  • [9] A picopower temperature-compensated, subthreshold CMOS voltage reference
    Albano, Domenico
    Crupi, Felice
    Cucchi, Francesca
    Iannaccone, Giuseppe
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2014, 42 (12) : 1306 - 1318
  • [10] An Ultra-Low Power High-Order Temperature-Compensated CMOS Voltage Reference
    de Oliveira, Arthur Campos
    Cordova, David
    Klimach, Hamilton
    Bampi, Sergio
    2017 IEEE 15TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2017, : 13 - 16