Single-crystalline ZnO sheet Source-Gated Transistors

被引:0
|
作者
A. S. Dahiya
C. Opoku
R. A. Sporea
B. Sarvankumar
G. Poulin-Vittrant
F. Cayrel
N. Camara
D. Alquier
机构
[1] Université François Rabelais de Tours,
[2] CNRS,undefined
[3] GREMAN UMR 7347,undefined
[4] 16,undefined
[5] rue pierre et marie Curie,undefined
[6] Advanced Technology Institute,undefined
[7] University of Surrey,undefined
[8] Université François Rabelais de Tours,undefined
[9] INSA-CVL,undefined
[10] CNRS,undefined
[11] GREMAN UMR 7347,undefined
[12] 3 rue de la Chocolaterie,undefined
来源
关键词
D O I
暂无
中图分类号
学科分类号
摘要
Due to their fabrication simplicity, fully compatible with low-cost large-area device assembly strategies, source-gated transistors (SGTs) have received significant research attention in the area of high-performance electronics over large area low-cost substrates. While usually based on either amorphous or polycrystalline silicon (α-Si and poly-Si, respectively) thin-film technologies, the present work demonstrate the assembly of SGTs based on single-crystalline ZnO sheet (ZS) with asymmetric ohmic drain and Schottky source contacts. Electrical transport studies of the fabricated devices show excellent field-effect transport behaviour with abrupt drain current saturation (IDSSAT) at low drain voltages well below 2 V, even at very large gate voltages. The performance of a ZS based SGT is compared with a similar device with ohmic source contacts. The ZS SGT is found to exhibit much higher intrinsic gain, comparable on/off ratio and low off currents in the sub-picoamp range. This approach of device assembly may form the technological basis for highly efficient low-power analog and digital electronics using ZnO and/or other semiconducting nanomaterial.
引用
收藏
相关论文
共 50 条
  • [1] Single-crystalline ZnO sheet Source-Gated Transistors
    Dahiya, A. S.
    Opoku, C.
    Sporea, R. A.
    Sarvankumar, B.
    Poulin-Vittrant, G.
    Cayrel, F.
    Camara, N.
    Alquier, D.
    SCIENTIFIC REPORTS, 2016, 6
  • [2] Stability evaluation of ZnO nanosheet based source-gated transistors
    Dahiya, A. S.
    Sporea, R. A.
    Poulin-Vittrant, G.
    Alquier, D.
    SCIENTIFIC REPORTS, 2019, 9 (1)
  • [3] Stability evaluation of ZnO nanosheet based source-gated transistors
    A. S. Dahiya
    R. A. Sporea
    G. Poulin-Vittrant
    D. Alquier
    Scientific Reports, 9
  • [4] Frequency Response of Source-Gated Transistors
    Shannon, John M.
    Balon, Frantisek
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2009, 56 (10) : 2354 - 2356
  • [5] Source-gated transistors in poly-silicon
    Shannon, JM
    Dovinos, D
    Balon, F
    Glasse, C
    Brotherton, SD
    IEEE ELECTRON DEVICE LETTERS, 2005, 26 (10) : 734 - 736
  • [6] Source-gated transistors in hydrogenated amorphous silicon
    Shannon, JM
    Gerstner, EG
    SOLID-STATE ELECTRONICS, 2004, 48 (07) : 1155 - 1161
  • [7] Source-gated thin-film transistors
    Shannon, JM
    Gerstner, EG
    IEEE ELECTRON DEVICE LETTERS, 2003, 24 (06) : 405 - 407
  • [8] Principle of operation and modeling of source-gated transistors
    Valletta, A.
    Mariucci, L.
    Rapisarda, M.
    Fortunato, G.
    JOURNAL OF APPLIED PHYSICS, 2013, 114 (06)
  • [9] Modeling of source-gated transistors in amorphous silicon
    Balon, F
    Shannon, JM
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2005, 152 (08) : G674 - G677
  • [10] Source-gated thin-film transistors
    Shannon, J. M.
    Balon, F.
    SOLID-STATE ELECTRONICS, 2008, 52 (03) : 449 - 454