Stability evaluation of ZnO nanosheet based source-gated transistors

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作者
A. S. Dahiya
R. A. Sporea
G. Poulin-Vittrant
D. Alquier
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[1] CNRS,GREMAN UMR 7347
[2] Université de Tours,Advanced Technology Institute, Department of Electrical and Electronic Engineering
[3] INSA-CVL,undefined
[4] 16 rue Pierre et Marie Curie,undefined
[5] University of Surrey,undefined
[6] Guildford,undefined
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摘要
Semiconducting nanostructures are one of the potential candidates to accomplish low-temperature and solution-based device assembly processes for the fabrication of transistors that offer practical solutions toward realizing low-cost flexible electronics. Meanwhile, it has been shown that by introducing a contact barrier, in a specific transistor configuration, stable device operation can be achieved at much reduced power consumption. In this work, we investigate both one-dimensional ZnO nanowires (NWs) and two-dimensional nanosheets (NSs) for high performance and stable nano-transistors on conventional Si/SiO2 substrates. We have fabricated two variant of transistors based on nanoscale single-crystalline oxide materials: field-effect transistors (FETs) and source-gated transistors (SGTs). Stability tests are performed on both devices with respect to gate bias stress at three different regimes of transistor operation, namely off-state, on-state and sub-threshold state. While in the off-state, FETs shows comparatively better stability than SGTs devices, in both sub-threshold and on-state regimes of transistors, SGTs clearly exhibits better robustness against bias stress variability. The present investigation experimentally demonstrates the potential advantages of SGTs over FETs as driver transistor for AMOLEDs display circuits which require very high stability in OLED driving current.
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