Large-area integration of two-dimensional materials and their heterostructures by wafer bonding

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作者
Arne Quellmalz
Xiaojing Wang
Simon Sawallich
Burkay Uzlu
Martin Otto
Stefan Wagner
Zhenxing Wang
Maximilian Prechtl
Oliver Hartwig
Siwei Luo
Georg S. Duesberg
Max C. Lemme
Kristinn B. Gylfason
Niclas Roxhed
Göran Stemme
Frank Niklaus
机构
[1] KTH Royal Institute of Technology,Division of Micro and Nanosystems, School of Electrical Engineering and Computer Science
[2] Protemics GmbH,Chair of Electronic Devices, Faculty of Electrical Engineering and Information Technology
[3] RWTH Aachen University,AMO GmbH
[4] Advanced Microelectronic Center Aachen (AMICA),Institute of Physics, EIT 2, Faculty of Electrical Engineering and Information Technology
[5] Universität der Bundeswehr München,undefined
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Integrating two-dimensional (2D) materials into semiconductor manufacturing lines is essential to exploit their material properties in a wide range of application areas. However, current approaches are not compatible with high-volume manufacturing on wafer level. Here, we report a generic methodology for large-area integration of 2D materials by adhesive wafer bonding. Our approach avoids manual handling and uses equipment, processes, and materials that are readily available in large-scale semiconductor manufacturing lines. We demonstrate the transfer of CVD graphene from copper foils (100-mm diameter) and molybdenum disulfide (MoS2) from SiO2/Si chips (centimeter-sized) to silicon wafers (100-mm diameter). Furthermore, we stack graphene with CVD hexagonal boron nitride and MoS2 layers to heterostructures, and fabricate encapsulated field-effect graphene devices, with high carrier mobilities of up to 4520cm2V−1s−1\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$4520\;{\mathrm{cm}}^2{\mathrm{V}}^{ - 1}{\mathrm{s}}^{ - 1}$$\end{document}. Thus, our approach is suited for backend of the line integration of 2D materials on top of integrated circuits, with potential to accelerate progress in electronics, photonics, and sensing.
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