Analytical modeling of dual-metal gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET

被引:0
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作者
Sumedha Gupta
Neeta Pandey
R. S. Gupta
机构
[1] Delhi Technological University,Department of Electronics and Communication Engineering
[2] Maharaja Agrasen Institute of Technology,Department of Electronics and Communication Engineering
来源
Applied Physics A | 2021年 / 127卷
关键词
Analytical model; Cylindrical surrounding gate; Junctionless accumulation mode; Parabolic potential approximation;
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摘要
This paper proposes a physics-based 2-D analytical model for a dual- material gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET. Analytical modeling is performed using 2-D Poisson’s equation in cylindrical co-ordinate system based upon parabolic potential approximation. This analysis derives the expressions for center potential, electric field, subthreshold drain current, transconductance, output conductance and switching speed. It is seen that this device possesses enhanced drain current, higher transconductance and lower output conductance. The gate-induced drain leakage current for this device has also been investigated. The subthreshold slope of this device is approximately 71 mV/ decade and Ion/Ioff ratio is also high, which leads to its usage for low power and high speed switching applications. The electrical characteristics and short channel effects of this device are also examined for different gate stack materials. It is observed that the device characteristics improve when permittivity of the gate stack is increased. Further, the results acquired using analytical modeling is mapped with the simulated data results to affirm and validate the device model structure. The simulation is implemented using ATLAS-3D device simulator.
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