Computational simulation of flip-chip underfill encapsulation process

被引：0
|
作者：
Gao, ZH
Xue, H
Liu, GR
Cui, CQ
机构：
[1] Natl Univ Singapore, Dept Mech & Prod Engn, Singapore 117548, Singapore
[2] Inst Microelect, Singapore, Singapore
来源：
HEAT TRANSFER SCIENCE AND TECHNOLOGY 2000 | 2000年
关键词：
underfill encapsulant; capillary force; VOF model; surface tension;
D O I：
暂无
中图分类号：
O3 [力学];
学科分类号：
08 ; 0801 ;
摘要：
The present work is focused on the study of the encapsulant underfill process between the chip material and the substrate. Two-dimensional transient underfill process is simulated using the computational fluid dynamics (CFD) code FLUENT. The volume of fluid (VOF) model is used to trace the flow leading edge. The simulation results are compared with the analytical predictions for fully developed 2-D flow and the experimental results in term of process lime with different encapsulant materials and gap distances between the chip and the substrate. Reasonable agreement has been achieved. Parameters affecting the processing time are discussed.
引用
收藏
页码：569 / 573
页数：5
相关论文
共 50 条
  • [1] Three-dimensional simulation of underfill process in flip-chip encapsulation
    Wang, Hui
    Zhou, Huamin
    Zhang, Yun
    Li, Dequn
    Xu, Kai
    [J]. COMPUTERS & FLUIDS, 2011, 44 (01) : 187 - 201
  • [2] Filling efficiency of flip-chip underfill encapsulation process
    Ng, Fei Chong
    Abas, Mohamad Aizat
    Abdullah, Mohd Zulkifly
    [J]. SOLDERING & SURFACE MOUNT TECHNOLOGY, 2020, 32 (01) : 10 - 18
  • [3] Underfill Flow in Flip-Chip Encapsulation Process: A Review
    Ng, Fei Chong
    Abas, Mohamad Aizat
    [J]. JOURNAL OF ELECTRONIC PACKAGING, 2022, 144 (01)
  • [4] Finite volume based CFD simulation of pressurized flip-chip underfill encapsulation process
    Khor, C. Y.
    Mujeebu, M. Abdul
    Abdullah, M. Z.
    Ani, F. Che
    [J]. MICROELECTRONICS RELIABILITY, 2010, 50 (01) : 98 - 105
  • [5] Simulation of no-flow underfill process for flip-chip assembly
    Kolbeck, A
    Hauck, T
    Jendrny, J
    Hahn, O
    Lang, S
    [J]. THERMAL AND MECHANICAL SIMULATION AND EXPERIMENTS IN MICROELECTRONICS AND MICROSYSTEMS, 2004, : 587 - 592
  • [6] Study on underfill/solder adhesion in flip-chip encapsulation
    Fan, LH
    Tison, CK
    Wong, CP
    [J]. IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2002, 25 (04): : 473 - 480
  • [7] Spatial analysis of underfill flow in flip-chip encapsulation
    Ng, Fei Chong
    Zawawi, Mohd Hafiz
    Abas, Mohamad Aizat
    [J]. SOLDERING & SURFACE MOUNT TECHNOLOGY, 2021, 33 (02) : 112 - 127
  • [8] Flip-Chip micro-thermal stress simulation in underfill process
    Lou, Wenzhong
    Yu, Xiuli
    [J]. 2007 2ND IEEE INTERNATIONAL CONFERENCE ON NANO/MICRO ENGINEERED AND MOLECULAR SYSTEMS, VOLS 1-3, 2007, : 419 - +
  • [9] Experimental study of filling behaviors in the underfill encapsulation of a flip-chip
    Shih, Meng-Fu
    Young, Wen-Bin
    [J]. MICROELECTRONICS RELIABILITY, 2009, 49 (12) : 1555 - 1562
  • [10] Mechanism Study of Ultrasonic-Vibration-Assisted Underfill Process for Flip-Chip Encapsulation
    Wang, Hui
    Xiang, Haiping
    Hao, Xufei
    Meng, Zhenghua
    Hua, Lin
    [J]. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2016, 6 (11): : 1711 - 1722
12345