GATE-LEVEL INFORMATION-FLOW TRACKING FOR SECURE ARCHITECTURES

被引：6
|
作者：
Tiwari, Mohit [1 ]
Li, Xun [1 ]
Wassel, Hassan M. G. [1 ]
Mazloom, Bita
Mysore, Shashidhar
Chong, Frederic T.
Sherwood, Timothy
机构：
[1] Univ Calif Santa Barbara, Dept Comp Sci, Santa Barbara, CA 93106 USA
来源：
IEEE MICRO | 2010年 / 30卷 / 01期
关键词：
Covert channels; High-assurance systems; Information-flow tracking; Noninterference; Timing channels;
D O I：
10.1109/MM.2010.17
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This article describes a new method for constructing and analyzing architectures that can track all information flows within a processor, including explicit, implicit, and timing flows. The key to this approach is a novel gate-level information-flow-tracking method that provides a way to create complex logical structures with well-defined information-flow properties.
引用
收藏
页码：92 / 100
页数：9
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