An 100-to-110 GHz Low-dc-power Sub-harmonically Injection-Locked Quadrature Oscillator using Stacked Boosting Technique in 90-nm CMOS Process

被引:3
|
作者
Chen, Wei-Cheng [1 ]
Yeh, Han-Nong [1 ]
Chang, Hong-Yeh [1 ]
机构
[1] Natl Cent Univ, Dept Elect Engn, Jhongli 32001, Taiwan
关键词
CMOS; low phase noise; millimeter-wave; MMIC/RFIC; oscillator; quadrature modulation; W-band;
D O I
10.1109/mwsym.2019.8700799
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A W-band sub-harmonically injection-locked quadrature oscillator is proposed using 90-nm CMOS process in this paper. Based on a stacked boosting technique, the negative resistance of the oscillation core can be highly enhanced. The fundamental oscillation frequency of the proposed quadrature oscillator can be up to 104 GHz with a dc power consumption of 8.5 mW. A transformer coupling is employed to widen the locking range for the sub-harmonically injection-locked operation. With a sub-harmonic number of 3, the measured overall locking range is from 100 to 110 GHz. The measured phase noise at 10 kHz offset is lower than -82 dBc/Hz over the frequency. Compared to the prior art, this work features wide locking range, quadrature outputs, low dc power consumption, and high frequency.
引用
收藏
页码:381 / 384
页数:4
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